Search Results - (( java implementation colony algorithm ) OR ( program optimization max algorithm ))

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  1. 1

    Maximum 2-satisfiability in radial basis function neural network by Shehab Abdulhabib Alzaeemi, Saratha Sathasivam, Mohd Shareduwan Mohd Kasihmuddin, Mohd. Asyraf Mansor

    Published 2020
    “…The simulated results suggest that the proposed algorithm is effective in doing MAX2SAT logic programming by analysing the performance by obtaining lower Root Mean Square Error, high ratio of satisfied clauses and lesser CPU time.…”
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  2. 2

    Fair energy-efficient resource allocation for downlink NOMA heterogeneous networks by Ali, Zuhura Juma, Noordin, Nor Kamariah, Sali, Aduwati, Hashim, Fazirulhisyam

    Published 2020
    “…Simultaneously, the max-min energy efficiency optimization approach is employed to maximize the minimum energy efficiency of the femtocell users to achieve the optimal power allocation solution. …”
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  3. 3

    Embedded system for indoor guidance parking with Dijkstra’s algorithm and ant colony optimization by Mohammad Ata, Karimeh Ibrahim

    Published 2019
    “…This study proposes a car parking management system which applies Dijkstra’s algorithm, Ant Colony Optimization (ACO) and Binary Search Tree (BST) in structuring a guidance system for indoor parking. …”
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  4. 4

    Digital beamforming implementation of switch-beam smart antenna system by using integrated digital signal processor and field-programmable gate array by Vakilian, Vida

    Published 2008
    “…Also, for more antenna radiation pattern optimization, the sidelobe cancellation is performed base on the chebyshev algorithm. …”
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  6. 6

    Digital Signal Processor (DSP) Design Using Very Long Instruction Word (VLIW) Architecture by Lee, Lini @ Lini Lee

    Published 2001
    “…Using, VHDL (Very-High-Speed-Integrated-Circuit Hardware Description Language) as design tool has the advantage in optimizing the pDSP hardware requirement with ease where varying the size of units such as register files (RF), program sequencer (PS), data address generator (DAG), arithmetic logic unit (ALU), multiply-accumulator (MAC) and shifter can be done by changing the data width or bit values. …”
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