Search Results - (( java implementation cell algorithm ) OR ( using programme boost algorithm ))

Embedded system based driver drowsiness detection system by Islam S.Z., Mohd Ali M.A., Bin Jidin R., Islam S.Z.

Beyond Grades - Predicting Programme Learning Outcomes with Multi-Output Regression in Malaysian Higher Education by Muhammad Noorazizi Abd Ghani, Istas Fahrurrazi Nusyirwan

Instruction Set Extension Of A Low-End Reconfigurable Microcontroller In Bit-Sorting Implementation by Salim, Sani Irwan, Soo, Yew Guan, Samsudin, Sharatul Izah

“…The modules’ integration is implemented using instruction set architecture (ISA) extension technique and is developed on the Field Programmable Gate Array (FPGA). …”
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Application Specific Instruction Set Processor (ASIP) Design In An 8-Bit Softcore Microcontroller by Salim, Sani Irwan, Soo, Yew Guan, Samsudin, Sharatul Izah

“…The modules’ integration is implemented using ASIP design without occurring extra board space and is developed using the Field Programmable Gate Array (FPGA) as the single chip solutions. …”
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Simple realization of 5-Segment discontinuous SVPWM based on FPGA by Sutikno, Tole, Jidin, Auzani, Basar, Mohd Farriz

“…These are software-based technique purely and obviously not an ideal solution. Employing Field Programmable Gate Array (FPGA) to realize SVPWM strategies provides advantages that it is considered as an appropriate solution to boost system performance of an SVPWM algorithm. …”
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Leaf condition analysis using convolutional neural network and vision transformer by Yong, Wai Chun, Ng, Kok Why, Haw, Su Cheng, Naveen, Palanichamy, Ng, Seng Beng

“…As a result, although customers may receive an excellent interactive features programme, the backend algorithm is not optimized. …”
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