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Performance evaluation of real-time multiprocessor scheduling algorithms
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FPGA Implementation of Emergency Door Car Entry System
Published 2008“…This kit contains everything that is needed to create a complete system-on-a-programmable-chip (SOPC) solution. Onboard chips are MAX® EPM7128S and FLEX® 10K EPF10K70-240. …”
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CPLD based controller for single phase inverters
Published 2007“…A design and implementation of PWM by using complex programmable logic device (CPLD) from Altera MaxPlus II is constructed and programmed. …”
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CPLD based controller for single phase inverters
Published 2007“…A design and implementation of PWM by using complex programmable logic device (CPLD) from Altera MaxPlus II is constructed and programmed. …”
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Parallel distributed genetic algorithm development based on microcontrollers framework
Published 2023Conference paper -
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Fast fourier transform processor implementation for high inputs on field programmable gates array
Published 2018“…Memory-based architecture chosen to use for FFT processors, due to the reduction in the number of butterflies and rotators, as they are reused for different stages of the FFT, were implemented on Cyclone II Field Programmable Gate Arrays (FPGA). Verilog Hardware Description Language (Verilog HDL) and VHDL Languages are used to program the algorithms into the FPGA. …”
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Smart appointment organizer for mobile application / Mohd Syafiq Adam
Published 2009“…In creating this application, NetBeans IDE 6.5and Java Micro Edition (Java ME) are used. This application can be installing into the mobile phone.…”
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Adoption of machine learning algorithm for analysing supporters and non supporters feedback on political posts / Ogunfolajin Maruff Tunde
Published 2022“…The support vector machines (SVM) algorithm obtained the overall best results of 94.5% accuracy, 91.8% precision, 91.7% recall, and 91.1% f-Measure while the naïve bayes (NB) algorithm obtained the best AUC score of 0.944 with the tweet data of Dato Seri Anwar. …”
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Digital Signal Processor (DSP) Design Using Very Long Instruction Word (VLIW) Architecture
Published 2001“…Based on the verification done on Programmable Logic Device (PLO) of MAX 7000s family, the operation can be executed in 40 MIPS (Million instructions per second). …”
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An Educational Tool Aimed at Learning Metaheuristics
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Mining association rules from structured XML data
Published 2009Get full text
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Scalable approach for mining association rules from structured XML data
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