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  1. 1
    Fuzzy modeling using Bat Algorithm optimization for classification

    Fuzzy modeling using Bat Algorithm optimization for classification by Noor Amidah, Ahmad Sultan

    Published 2018
    “…A Sazonov Engine which is a fuzzy java engine is use to apply Bat Algorithm in the experiment. …”
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  2. 2
    Study and Implementation of Data Mining in Urban Gardening

    Study and Implementation of Data Mining in Urban Gardening by Mohana, Muniandy, Lee, Eu Vern

    Published 2019
    “…Using the J48 tree algorithm implemented through WEKA API on a Java Servlet, data provided is processed to derive a health index of the plant, with the possible outcomes set to “Good,” “Okay”, or “Bad”. …”
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  3. 3
    PAPR and BER analysis of mobile WiMAX system using QC-LDPC code with STFBC MIMO OFDMA system / Siti Nor Hasima Mat Jusoh

    PAPR and BER analysis of mobile WiMAX system using QC-LDPC code with STFBC MIMO OFDMA system / Siti Nor Hasima Mat Jusoh by Mat Jusoh, Siti Nor Hasima

    Published 2014
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  4. 4
    Adoption of machine learning algorithm for analysing supporters and non supporters feedback on political posts / Ogunfolajin Maruff Tunde

    Adoption of machine learning algorithm for analysing supporters and non supporters feedback on political posts / Ogunfolajin Maruff Tunde by Ogunfolajin Maruff , Tunde

    Published 2022
    “…The method was implemented using Java and the results of the simulation were evaluated using five standard performance metrics: accuracy, AUC, precision, recall, and f-Measure. …”
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  5. 5
    WIMAX TESTBED

    WIMAX TESTBED by KOH , MINGHAO

    Published 2008
    “…This project also takes the first few steps of hardware implementation by using Real Time Workshop to convert the Simulink model into C codes which run outside MATLAB. …”
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    Final Year Project
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  6. 6
    Digital beamforming implementation of switch-beam smart antenna system by using integrated digital signal processor and field-programmable gate array

    Digital beamforming implementation of switch-beam smart antenna system by using integrated digital signal processor and field-programmable gate array by Vakilian, Vida

    Published 2008
    “…After modeling, the algorithm is implemented in DSP. By using the Hardware- In-Loop facility of DSP, the comparison between hardware implementation and software modeling is performed. …”
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  7. 7
    The design of viterbi decoder for low power consumption space time trellis code without adder architecture using RTL model

    The design of viterbi decoder for low power consumption space time trellis code without adder architecture using RTL model by Abu, Mohd Azlan, Harun, Harlisya, Harmin, Mohammad Yazdi, Abdul Wahab, Noor Izzri, Abdul Kadir, Muhd Khairulzaman

    Published 2016
    “…Design/methodology/approach – The code uses a generator matrix designed for four-state space time trellis code (STTC) that uses quadrature phase shift keying (QPSK) modulation scheme. …”
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  8. 8
    Dynamic transmit antenna shuffling scheme for hybrid multiple-input multiple-output in layered architecture

    Dynamic transmit antenna shuffling scheme for hybrid multiple-input multiple-output in layered architecture by Chong, Jin Hui

    Published 2010
    “…Finally, the performance of V-BLAST/STBC transceiver scheme with proposed LC-QR algorithm is compared with other MIMO systems, such as V-BLAST and orthogonal space-time block codes. …”
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  9. 9
    FPGA Implementation of Emergency Door Car Entry System

    FPGA Implementation of Emergency Door Car Entry System by Zaini Sulaiman

    Published 2008
    “…Altera® Quartus II is used to create the source code and download it into the FPGA board. …”
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    Learning Object
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  10. 10
    A multilayered convolutional sparse coding framework for modeling of pooling operation of convolution neural networks

    A multilayered convolutional sparse coding framework for modeling of pooling operation of convolution neural networks by , Abdul Wahid, Khan, Adnan Umar, , Mukhtarullah, Khan, Sheroz, Shah, Jawad

    Published 2019
    “…The multilayered version of CSC(ML-CSC) is shown to be connected to forward pass of CNNs and dictionary learning and sparse coding algorithms of this model are analyzed for solving classification and inverse problems in image processing. …”
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  11. 11
    Embedded system for indoor guidance parking with Dijkstra’s algorithm and ant colony optimization

    Embedded system for indoor guidance parking with Dijkstra’s algorithm and ant colony optimization by Mohammad Ata, Karimeh Ibrahim

    Published 2019
    “…This study proposes a car parking management system which applies Dijkstra’s algorithm, Ant Colony Optimization (ACO) and Binary Search Tree (BST) in structuring a guidance system for indoor parking. …”
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  12. 12
    Fractal coding of bio-metric image for face authentication

    Fractal coding of bio-metric image for face authentication by Ahadullah, Md

    Published 2021
    “…This thesis implements the algorithms for the Methods of CPM, BPBM fractal coding, and its application. …”
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  13. 13
    Design of an OFDM transmitter and receiver using FPGA

    Design of an OFDM transmitter and receiver using FPGA by Loo, Kah Cheng

    Published 2004
    “…This performance of the coding is analyzed from the result of timing simulation using Altera Max Plus II…”
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  14. 14
    Competitive improvement of the time complexity to encode fractal image: by applying symmetric central pixel of the block

    Competitive improvement of the time complexity to encode fractal image: by applying symmetric central pixel of the block by Md Ahadullah, Sapar, Siti Hasana, Al-Saidi, Nadia Mohammed Ghanim, Md Said, Mohamad Rushdan

    Published 2021
    “…As a consequence, the symmetrical CP of odd pixels block, reduction of block space, and edge pixel selection accomplished faster coding and competitive image quality than existing known exhaustive search algorithms.…”
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  15. 15
    Development of low power viterbi decoder on complex programmable logic device platform

    Development of low power viterbi decoder on complex programmable logic device platform by Abu, Mohd Azlan

    Published 2018
    “…Consequently, the number of logic gates and the total power consumption of the STTC Viterbi decoder can be reduced by using the new algorithms. The proposed algorithms have been designed and implemented by using MATLAB, Altera Quartus 2 and Altera MAX V CPLD board. …”
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  16. 16
    Antenna design using left-handed materials

    Antenna design using left-handed materials by Abd. Rahman, Tharek, Abdolee, Reza

    Published 2008
    “…After modeling, the algorithm is implemented in DSP by using C and Code Composer Studio. …”
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  17. 17
    A Scheme For Space-Time-Frequency Coding And Adaptive Multiple Antenna Selection For Improving The Performance Of Multiple-Input Single-Output Ofdm System

    A Scheme For Space-Time-Frequency Coding And Adaptive Multiple Antenna Selection For Improving The Performance Of Multiple-Input Single-Output Ofdm System by Noordin, Nor Kamariah

    Published 2006
    “…This scheme employs a space-time-frequency coding with a symbol rate of ¾, using orthogonal signals, to avoid high complexity in detection. …”
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  18. 18
    Antenna design using left-handed materials

    Antenna design using left-handed materials by Abd. Rahman, Tharek, Ngah, Razali, Ahmad, Mohd. Riduan, Abdolee, Reza, Leow, Chee Yen, I. A. Omer, Abdusamea, Osman Elsayed, Waiel Elsayed, Yusuf, Yusuf Ali, Pon, Lai Ly

    Published 2008
    “…After modeling, the algorithm is implemented in DSP by using C and Code Composer Studio. …”
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  19. 19
    Iot health monitoring system for self quarantined covid-19 patients

    Iot health monitoring system for self quarantined covid-19 patients by Vikneswaran, Balakrishnan

    Published 2022
    “…The software used to do coding is Arduino IDE which is suitable for all Arduino boards. …”
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  20. 20
    Digital Signal Processor (DSP) Design Using Very Long Instruction Word (VLIW) Architecture

    Digital Signal Processor (DSP) Design Using Very Long Instruction Word (VLIW) Architecture by Lee, Lini @ Lini Lee

    Published 2001
    “…It has been shown that changing the data width or bit values in the VHDL source code of the subsystem can easily change the subsystems' sizes. …”
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