Search Results - (( integer implementation 5s algorithm ) OR ( java data integration algorithm ))

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    Modification of particle swarm optimization algorithm for optimization of discrete values by Mohd Yassin, Ahmad Ihsan, Jusoh, Muhammad Huzaimy, Abdul Rahman, Farah Yasmin

    Published 2011
    “…These methods generally either represent the solution in binary form [5) or round off the continuous results into the closest integer [6-8). …”
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    Research Reports
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    Separator Database and SPM Tree Framework for Mining Sequential Patterns Using Prefixspan with Pseudoprojection by Dhany, Saputra

    Published 2008
    “…The results also show that in Java, A Arraylist is the most suitable choice for storing Object and Arraylnt list is the most suitablec choice for storing integer data. …”
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    Thesis
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    Fpga Implementation Of Metaheuristic Optimization Algorithm by Phuah, Soon Eu

    Published 2022
    “…Then the Discrete SKF was adapted from the original metaheuristic by rounding all floating-point values to integers as well as setting a fixed Kalman gain of 0.5. …”
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    Undergraduates Project Papers
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    FPGA implementation of metaheuristic optimization algorithm by Nurul Hazlina, Noordin, Phuah, Soon Eu, Zuwairie, Ibrahim

    Published 2023
    “…Then the Discrete SKF was adapted from the original metaheuristic by rounding all floating-point values to integers as well as setting a fixed Kalman gain of 0.5. …”
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    Article
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    Separator Database and SPM Tree Framework for Mining Sequential Patterns Using Prefixspan with Pseudoprojection by Saputra , Dhany, Rambli, Dayang R.A., Foong, Oi Mean

    Published 2008
    “…The results also show that in Java, A Arraylist is the most suitable choice for storing Object and Arraylnt list is the most suitablec choice for storing integer data. …”
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    Thesis
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    Case Slicing Technique for Feature Selection by A. Shiba, Omar A.

    Published 2004
    “…The classification accuracy obtained from the CST method is compared to other selected classification methods such as Value Difference Metric (VDM), Pre-Category Feature Importance (PCF), Cross-Category Feature Importance (CCF), Instance-Based Algorithm (IB4), Decision Tree Algorithms such as Induction of Decision Tree Algorithm (ID3) and Base Learning Algorithm (C4.5), Rough Set methods such as Standard Integer Programming (SIP) and Decision Related Integer Programming (DRIP) and Neural Network methods such as the Multilayer method.…”
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    Thesis
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    Investigation on pattern based Algorithm for division by a constant number using Verilog code for optimization on the Nelust results by Fouziah Md Yassin, Ag Asri Ag Ibrahim, Zaturrawiah Ali Omar, Saturi Baco

    Published 2015
    “…The result is rounded to the nearest integer for divisors of 3, 5, 6, 7 and 9. The methodology of this research are involving design specification, high level design using C++, RTL level description using Verilog, functional verification and logic synthesis using two different technology library. …”
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    Research Report
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    Classification of breast cancer disease using bagging fuzzy-id3 algorithm based on fuzzydbd by Nur Farahaina, Idris

    Published 2022
    “…There are various decision tree algorithms, but the most commonly used are Iterative Dichotomiser 3 (ID3), CART, and C4.5. …”
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    Thesis
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    Smart student timetable planner by Wong, Xin Tong

    Published 2025
    “…Course data is managed in CSV format, parsed into JSON for fast processing, while sessionStorage and localStorage handle user data within active sessions. …”
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    Final Year Project / Dissertation / Thesis
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    Nested repetitive structure techniques in examination seating number allocation process at UiTM Pulau Pinang branch / Jamal Othman, Rozita Kadar and Naemah Abdul Wahab by Othman, Jamal, Kadar, Rozita, Abdul Wahab, Naemah

    Published 2020
    “…To automate the process of assigning the seating numbers, an algorithm was designed and constructed using the nested repetitive or looping structure techniques with JAVA programming language. …”
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    Article
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    Rounded off unsigned constant division using add-shift in verilog by Fouziah Md Yassin, Ag Asri Ag Ibrahim, Zaturrawiah Ali Omar, Saturi Baco, Nor Azura Zakaria, Edward V.Bautista Jr.

    Published 2016
    “…This paper presents the logic synthesis result of the add-shift scheme that was modified from existing algorithm and was described in Verilog code. The constant denominators (deno) were 3, 5, 6, 7 and 9 and the input variables (n) were of 13 bits. …”
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    Article