Search Results - (( gate generation using algorithm ) OR ( java simulation optimization algorithm ))

Attribute reduction based scheduling algorithm with enhanced hybrid genetic algorithm and particle swarm optimization for optimal device selection by Nwogbaga, Nweso Emmanuel, Latip, Rohaya, Affendey, Lilly Suriani, Abdul Rahiman, Amir Rizaan

“…The simulation is implemented with iFogSim and java programming language. …”
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Enhancement of Ant Colony Optimization for Grid Job Scheduling and Load Balancing by Husna, Jamal Abdul Nasir

“…Global pheromone update is performed after the completion of processing the jobs in order to reduce the pheromone value of resources. A simulation environment was developed using Java programming to test the performance of the proposed EACO algorithm against existing grid resource management algorithms such as Antz algorithm, Particle Swarm Optimization algorithm, Space Shared algorithm and Time Shared algorithm, in terms of processing time and resource utilization. …”
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Ant colony optimization algorithm for load balancing in grid computing by Ku-Mahamud, Ku Ruhana, Mohamed Din, Aniza

“…The proposed algorithm is known as the enhance ant colony optimization (EACO). …”
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Studies on flat CORDIC implementation in field programmable gate arrays (FPGA) / Meera Subramaniam by Meera , Subramaniam

“…This work presents a modification to the previous Signed Digit (SD) Generation algorithm and a comparison with the previous method. …”
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OPTIMIZED MIN-MIN TASK SCHEDULING ALGORITHM FOR SCIENTIFIC WORKFLOWS IN A CLOUD ENVIRONMENT by Murad S.S., Badeel R., Alsandi N.S.A., Alshaaya R.F., Ahmed R.A., Muhammed A., Derahman M.

“…To achieve this, we propose a new noble mechanism called Optimized Min-Min (OMin-Min) algorithm, inspired by the Min-Min algorithm. …”

Embedded system for indoor guidance parking with Dijkstra’s algorithm and ant colony optimization by Mohammad Ata, Karimeh Ibrahim

“…This study proposes a car parking management system which applies Dijkstra’s algorithm, Ant Colony Optimization (ACO) and Binary Search Tree (BST) in structuring a guidance system for indoor parking. …”
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Features selection for intrusion detection system using hybridize PSO-SVM by Tabaan, Alaa Abdulrahman

“…Hybridize Particle Swarm Optimization (PSO) as a searching algorithm and support vector machine (SVM) as a classifier had been implemented to cope with this problem. …”
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An Improved Linear Feedback Shift Register (LFSR- based) Stream Cipher Generator by Mahdi, Reyadh H

“…Linear feedback shift register ( LFSR-based) stream cipher an improved design for a random key generator in a stream cipher algorithm. The proposed random key generator is simply designed to produce a very quick algorithm to be used for securing GSM communication as mobiles or in satellite communications channels, and it use to avoid attack that happen on cryptography in general and on stream cipher in specific. …”
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Resource management in grid computing using ant colony optimization by Ku-Mahamud, Ku Ruhana, Mohamed Din, Aniza

“…Resources with high pheromone value are selected to process the submitted jobs.Global pheromone update is performed after completion processing the jobs in order to reduce the pheromone value of resources.A simulation environment was developed using Java programming to test the performance of the proposed EACO algorithm against other ant based algorithm, in terms of resource utilization.Experimental results show that EACO produced better grid resource management solution.…”
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Forensic language of property theft genre based on mathematical formulae and machine learning algorithms / Hana' Abd Razak by Abd Razak, Hana'

“…Convolution Neural Network (CNN) using deep learning algorithm is chosen in identifying frequency of movement and execution time of housebreaking crime. …”
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Implementation of locust inspired scheduling algorithm with huge number of servers for energy efficiency in a cloud datacenter by Azhar, Nur Huwaina

“…Cloudsim is used as Discrete Event Simulation tool and Java as coding language to evaluate LACE algorithm. …”
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The memory-less method of generating multiplicative inverse values for S-box in AES algorithm by Siti Zarina, Md Naziri, Norina, Idris

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Design of Cryptographic Hardware Module Using FPGA by Muhammad Imran, Ahmad, Abdul Rahman, Mohd Saad, Mohd Nazrin, Md Isa, Mohd Taufik, Jusoh, Amir Razif Arief, Jamil Abdullah

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Real time motorcycle image detections on field programmable gate array by Mat Nong, Mohd Ali, Osman, Rosiah, Md Yusof, Juraina, Mohd Sidek, Roslina

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Design and analysis of low power sequence generator module for DNA fragment assembly: article / Nurul Amalina Abu Seman by Abu Seman, Nurul Amalina

“…This paper presents the design and analysis of low power Sequence Generator Module (SGM) for DNA Fragment Assembly. The objectives of this project are to construct DNA Fragment Assembly module using Euler algorithm and optimize power consumption of the module. …”
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Predicting machine failure using recurrent neural network-gated recurrent unit (RNN-GRU) through time series data by Zainuddin, Z., P. Akhir, E.A., Hasan, M.H.

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Design and analysis of low power sequence generator module for DNA fragment assembly / Nurul Amalina Abu Seman by Abu Seman, Nurul Amalina

“…This thesis presents the design and analysis of low power Sequence Generator Module (SGM) for DNA Fragment Assembly. The objectives of this project are to construct DNA Fragment Assembly module using Euler algorithm and optimize power consumption of the module. …”
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SVM based hysteresis current controller for a three phase active power filter by Leow, Pei Ling

“…The switching control algorithms of the proposed SVM based HCC manages to generate appropriate switching gates to the active power filter. …”
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Committee neural networks with fuzzy genetic algorithm. by Jafari , S.A., Mashohor , Syamsiah, Varnamkhasti, M. Jalali

“…Finally, we use fuzzy genetic algorithm methods for combining the output of experts to predict a reservoir parameter in petroleum industry. …”
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Hardware Implementation Of Rc4a Stream Cipher Algorithm by Al Noman, Abdullah

“…For hardware implementation of the design, an Altera Field Programmable Gate Array (FPGA) device, EP20K200EFC484-2X from APEX family, APEX 20KE, has been used. …”
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