Search Results - (( gate generation process algorithm ) OR ( java implication based algorithm ))

Studies on flat CORDIC implementation in field programmable gate arrays (FPGA) / Meera Subramaniam by Meera , Subramaniam

“…This work presents a modification to the previous Signed Digit (SD) Generation algorithm and a comparison with the previous method. …”
Get full text
Get full text

Design of Cryptographic Hardware Module Using FPGA by Muhammad Imran, Ahmad, Abdul Rahman, Mohd Saad, Mohd Nazrin, Md Isa, Mohd Taufik, Jusoh, Amir Razif Arief, Jamil Abdullah

Get full text

Real time motorcycle image detections on field programmable gate array by Mat Nong, Mohd Ali, Osman, Rosiah, Md Yusof, Juraina, Mohd Sidek, Roslina

Get full text
Get full text

The development of RNA logic gates library for the construction of molecular information processing circuits / Lee Yiling by Lee , Yiling

“…At its core, these devices can process physical or chemical inputs to generate outputs imitating conventional Boolean logical operators. …”
Get full text
Get full text
Get full text

Design and analysis of low power sequence generator module for DNA fragment assembly: article / Nurul Amalina Abu Seman by Abu Seman, Nurul Amalina

“…This paper presents the design and analysis of low power Sequence Generator Module (SGM) for DNA Fragment Assembly. The objectives of this project are to construct DNA Fragment Assembly module using Euler algorithm and optimize power consumption of the module. …”
Get full text
Get full text

Design and analysis of low power sequence generator module for DNA fragment assembly / Nurul Amalina Abu Seman by Abu Seman, Nurul Amalina

“…This thesis presents the design and analysis of low power Sequence Generator Module (SGM) for DNA Fragment Assembly. The objectives of this project are to construct DNA Fragment Assembly module using Euler algorithm and optimize power consumption of the module. …”
Get full text
Get full text

Design of a reconfigurable computing platform by Papu J.J., See O.H.

“…The PSP also automates the synthesis and implementation process integration to generate the bitstream file from the Xilinx ISE foundation tool. …”

Hardware And Software Partitioning Using Genetic Algorithm In Image Processing Application by Loo, Fang Hean

“…In this project, HW-SW Partitioning is used as a process to map each task of image processing application to be executed either in software (Hard Processor System, HPS) or hardware (Field Programmable Gate Array, FPGA). …”
Get full text
Get full text

Hardware Design Of Random Number Generator And Random Walk-Onboundary Algorithm To Compute Unit Cube Capacitance In Fpga by Niun, Cheah How

Get full text
Get full text

Harmonic Elimination Pulse Width Modulation Using Differential Evolution Technique For Three Phase Voltage Source Inverter by Kamisman, Norazelina

“…Performance of the DE algorithm is highly affected by the mutant vector which is generated through a specific mutation process. …”
Get full text
Get full text
Get full text
Get full text

MBIST implementation and evaluation in FPGA based on low-complexity March algorithms by Jidin, Aiman Zakwan, Mispan, Mohd Syafiq, Hussin, Razaidi, Weng, Fook Lee

“…This paper presents the implementation and validation of MBIST controllers that applied the March AZ1 and March AZ2 algorithms in a Field-Programmable Gate Array (FPGA) device. …”
Get full text
Get full text
Get full text

The implications for ahybrid detection technique against malicious sqlattacks on web applications by Bahjat Arif, Sarajaldeen Akram, Wani, Sharyar

Get full text
Get full text
Get full text

Fuzzy-controlled battery charger state-of-charge controller by Rahim, N.A., Mekhilef, Saad, Chan, E.L., Ping, H.W.

“…The PWM generator supplies gating signals for the converters, and the fuzzy controller provides control over the PWM pattern. …”
Get full text
Get full text

Hyperparameter tuned deep learning enabled intrusion detection on internet of everything environment by Ahmed Hamza, Manar, Hassan Abdalla Hashim, Aisha, G. Mohamed, Heba, S. Alotaibi, Saud, Mahgoub, Hany, S. Mehanna, Amal, Motwakel, Abdelwahed

“…Finally, MVO algorithm is exploited with Bidirectional Gated Recurrent Unit (BiGRU) model for classification. …”
Get full text
Get full text
Get full text

Implementation of High Speed Large Integer Multiplication Algorithm on Contemporary Architecture by Chang, Boon Chiao

“…While GPU allowed users to configure each of the cores (processing units) to perform independent tasks, FPGA provides users a platform to design the processing units themselves to perform dedicated arithmetic and logic operation.In our GPU implementation, we present two different large integer algorithms implementation on two generation of NVIDIA GPU architectures, Kepler and Pascal. …”
Get full text
Get full text

Disparity map algorithm using hierarchical of bitwise pixel differences and segment-tree from stereo image by Zainal Azali, Muhammad Nazmi

“…In computer vision technology, stereo matching algorithm plays an important role in generating disparity map or depth map through a correspondence process from stereo images. …”
Get full text
Get full text
Get full text
Get full text

Digital Quran With Storage Optimization Through Duplication Handling And Compressed Sparse Matrix Method by Ashraf Saleh Mohammad Alomoush

Digital Signal Processor (DSP) Design Using Very Long Instruction Word (VLIW) Architecture by Lee, Lini @ Lini Lee

“…The architecture of the pDSP core must be designed in such a way that parallel processing can be carried out and computational units can be integrated into the core with ease. …”
Get full text
Get full text