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  1. 1

    AUTOMATED MODEL GENERATION OF FSM AND NUSMV MODEL FROM RSA JAVA SOURCE CODE FOR MODEL CHECKING by SALLEH AL-HUMAIKANI, MOHAMMED ABDULQAWI

    Published 2021
    “…The encryption algorithms are playing an important part in the protection level for data. …”
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    Thesis
  2. 2

    Implementation of (AES) Advanced Encryption Standard algorithm in communication application by Moh, Heng Huong

    Published 2014
    “…Internet communication has become more common in this modern world recently, and one of the important algorithms used is ABS algorithm. However, most of the users have inadequate knowledge and understanding regard to this algorithm implementation in the communication field, as well as the level of security and accuracy will be questioned by the users because of the necessary to maintain the confidentiality of particular data transferred. …”
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    Undergraduates Project Papers
  3. 3

    Implementation of locust inspired scheduling algorithm with huge number of servers for energy efficiency in a cloud datacenter by Azhar, Nur Huwaina

    Published 2019
    “…It does not consider the LACE algorithm implemented in huge number of server in one Cloud datacenter. …”
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    Thesis
  4. 4

    Real time motorcycle image detections on field programmable gate array by Mat Nong, Mohd Ali, Osman, Rosiah, Md Yusof, Juraina, Mohd Sidek, Roslina

    Published 2015
    “…Development of real time motorcycle image detections on field programmable architecture is presented in this paper. …”
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    Conference or Workshop Item
  5. 5

    A Model for Evaluation of Cryptography Algorithm on UUM Portal by Norliana, Abdul Majid

    Published 2004
    “…Level one is the development of userID and password, level two involve the insertion of the testing parameter speed coding. …”
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    Thesis
  6. 6

    Comparison of Search Algorithms in Javanese-Indonesian Dictionary Application by Yana Aditia, Gerhana, Nur, Lukman, Arief Fatchul, Huda, Cecep Nurul, Alam, Undang, Syaripudin, Devi, Novitasari

    Published 2020
    “…Performance Testing is used to test the performance of algorithm implementations in applications. The test results show that the Boyer Moore and Knuth Morris Pratt algorithms have an accuracy rate of 100%, and the Horspool algorithm 85.3%. …”
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    Journal
  7. 7

    An improved RSA cryptosystem based on thread and CRT / Saheed Yakub Kayode and Gbolagade Kazeem Alagbe by Yakub Kayode, Saheed, Kazeem Alagbe, Gbolagade

    Published 2017
    “…We use a parallel technique that divides RSA power process into seperate threads and employs the use of Chinese Remainder Theorem (CRT) to decrease the time required for both encryption and decryption operation. Java programming language is used to implement the algorithm. …”
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    Article
  8. 8

    Implementation of Real-time Simple Edge Detection on FPGA by Mohd Shukor, Mohd Nasir, Lo, H. H., Sebastian , Patrick

    Published 2005
    “…The chosen image processing algorithms implemented was edge detection. This work utilizes Altera DE2 development board powered by Cyclone II FGPA pair with 1.3 Mega pixel CMOS camera from Terasic Technologies. …”
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    Conference or Workshop Item
  9. 9

    Design and Implementation of Data-at-Rest Encryption for Hadoop by Wan Nor Shuhadah, Wan Nik, Mohamad Afendee, Mohamed, Zarina, Mohamad, Siti Hanisah, Kamaruzaman

    Published 2017
    “…Therefore, the AES encryption algorithm has been implemented in HDFS to ensure the security of data stored in HDFS. …”
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    Conference or Workshop Item
  10. 10

    Design and Implementation of Data-at-Rest Encryption for Hadoop by Wan Nor Shuhadah, Wan Nik, Mohamad Afendee, Mohamed, Zarina, Mohamad, Siti Hanisah, Kamaruzaman

    Published 2017
    “…Therefore, the AES encryption algorithm has been implemented in HDFS to ensure the security of data stored in HDFS. …”
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    Conference or Workshop Item
  11. 11

    Implementation of real-time simple edge detection on FPGA by P., Sebastian, M.N.B.M., Shukor, H.H., Lo

    Published 2007
    “…The chosen image processing algorithms implemented was edge detection. This work utilizes Altera DE2 development board powered by Cyclone II FGPA pair with 1.3 Mega pixel CMOS camera from Terasic Technologies. …”
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    Conference or Workshop Item
  12. 12

    IMAGE PROCESSING ALGORITHMS ON FPGA by MOHAMED SHUKOR, MOHAMED NASIR

    Published 2007
    “…The objective of this project is to construct a real time hardware image processing system which based on Field Programmable Gate Array (FPGA). The chosen image processing algorithms are implemented on two systems which are Color Filtering System and Edge Detection System. …”
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    Final Year Project
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    Design and implementation of multimedia digital matrix system by Chui, Yew Leong, Ramli, Abdul Rahman, Perumal, Thinagaran, Sulaiman, Mohd Yusof, Ali, Mohd Liakot

    Published 2005
    “…Due to the issues of signal integrity in high-speed digital design, a new adaptive channel synchronization algorithm has been developed. The algorithm, named as hybrid-reset algorithm utilizes the nature of asynchronous reset to compensate the drawback of synchronous counter for phase detection. …”
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    Conference or Workshop Item
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    Low area Programmable Memory Built-In Self-Test (PMBIST) for small embedded ram cores / Nur Qamarina Mohd Noor by Mohd Noor, Nur Qamarina

    Published 2013
    “…The memory BIST applies various test algorithms such as MARCH tests to detect various RAM faults. …”
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    Thesis
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    Secure E-Voting With Blind Signature by Ibrahim, Subariah, Kamat, Maznah, Salleh, Mazleena, Abdul Aziz, Shah Rizan

    Published 2003
    “…In this system, voter’s privacy is guaranteed by using a blind signature for confidentiality and voter’s digital signature for voter’s authentication. E-Voting is implemented by employing Java socket technology and BouncyCastle cryptography provider. …”
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    Conference or Workshop Item
  18. 18

    Development of a steady state visual evoked potential (SSVEP)-based brain computer interface (BCI) system by Leow, R.S., Ibrahim, F., Moghavvemi, M.

    Published 2007
    “…This paper describes the development of a synchronous, online brain computer interface (BCI) system based on detecting the steady-state visual evoked potential (SSVEP). …”
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    Conference or Workshop Item
  19. 19

    Design and analysis of high performance matrix filling for DNA sequence alignment accelerator using asic design flow: article / Nurzaima Mahmod by Mahmod, Nurzaima

    “…To optimize the performance of the algorithm by exploiting parallelism in the design several techniques have been developed. …”
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    Article
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