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  1. 1
    Design of a floating point unit for 32-bit 5 stage pipeline processor

    Design of a floating point unit for 32-bit 5 stage pipeline processor by Low, Wai Hau

    Published 2020
    “…The development project will start by studying the algorithm of addition on floating point numbers. …”
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  2. 2
    Hardware Implementation Of Rc4a Stream Cipher Algorithm

    Hardware Implementation Of Rc4a Stream Cipher Algorithm by Al Noman, Abdullah

    Published 2007
    “…Verilog Hardware Description Language (HDL) and top down design methodology has been used to design the hardware implemented in this thesis. …”
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  3. 3
    A cluster analysis of population based cancer registry in Brunei Darussalam : an exploratory study

    A cluster analysis of population based cancer registry in Brunei Darussalam : an exploratory study by Lai, Daphne Teck Ching, Owais A. Malik

    Published 2022
    “…The subgroups found have good quality clusters, moderate association with cancer types and high stability. The top three prevalent cancers associated with these subgroups were consistently identified using the three algorithms. …”
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  4. 4
    FPGA implementation of multiplier for floating-point numbers based on IEEE 754-2008 standard

    FPGA implementation of multiplier for floating-point numbers based on IEEE 754-2008 standard by Shyamsi, M., Ibrahimy, Muhammad Ibn, Motakabber, S. M. A., Ahsan, M. R.

    Published 2015
    “…However, it is a challenging task to implement a floating-point multiplication in hardware level or in low level language due to the complexity of algorithms. A top-down approach has been applied for the prototyping of IEEE 754-2008 standard floating-point multiplier module using Verilog Hardware Description Language (HDL). …”
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  5. 5
    Design and development of high performance swa cell design for local DNA sequence alignment

    Design and development of high performance swa cell design for local DNA sequence alignment by Syed Abdul Rahman, Syed Abdul Mutalib Al Junid

    Published 2017
    “…The performance of the DNA sequence alignment system strongly depends on the algorithm, design architecture and accelerator performance. …”
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  6. 6
    Runtime pluggable CPU scheduler for linux operating system

    Runtime pluggable CPU scheduler for linux operating system by Al-Maweri, Nasr Addin Ahmed Salem

    Published 2010
    “…It also provides a flexible interface for kernel developers which facilitates the evaluation and testing for their newly developed scheduling algorithms. …”
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  7. 7
    Virtual screening for potential inhibitors of human hexokinase II for the development of anti-dengue therapeutics

    Virtual screening for potential inhibitors of human hexokinase II for the development of anti-dengue therapeutics by Tanbin, Suriyea, Ahmad Fuad, Fazia Adyani, Abdul Hamid, Azzmer Azzar

    Published 2021
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  8. 8
    Effects of Ambient Tropospheric Ozone on Mr-219 Rice in the Muda Irrigation Scheme Area

    Effects of Ambient Tropospheric Ozone on Mr-219 Rice in the Muda Irrigation Scheme Area by Ismail, Marzuki

    Published 2005
    “…For plant growth and development study, yield is the most critical parameter. …”
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