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  1. 1
    Developed method of FPGA-based fuzzy logic controller design with the aid of conventional PID algorithm

    Developed method of FPGA-based fuzzy logic controller design with the aid of conventional PID algorithm by Obaid, Zeyad Assi, Sulaiman, Nasri, Hamidon, Mohd Nizar

    Published 2009
    “…This paper proposes developed method to design a digital fuzzy logic controller with the aid of conventional Proportional – integral – derivative (PID) controller using field programmable gate array (FPGA). …”
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  2. 2
    Agent-based extraction algorithm for computational problem solving

    Agent-based extraction algorithm for computational problem solving by Rajabi, Maryam

    Published 2015
    “…On the other hand, agent-based model offers a good method to solve complex computational problems. Therefore, utilizing the agent-based featured agents for this purpose is a benefit with the aim of helping novice programmers to understand the CPS without knowing the programming language. …”
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  3. 3
    Development of low power viterbi decoder on complex programmable logic device platform

    Development of low power viterbi decoder on complex programmable logic device platform by Abu, Mohd Azlan

    Published 2018
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  4. 4
    Literature Survey On Stereo Vision Disparity Map Algorithms

    Literature Survey On Stereo Vision Disparity Map Algorithms by Rostam Affendi, Hamzah, Haidi, Ibrahim

    Published 2016
    “…To assist future researchers in developing their own stereo matching algorithms, a summary of the existing algorithms developed for every stage of processing is also provided. …”
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  5. 5
    Flowshop scheduling using artificial bee colony (ABC) algorithm with varying onlooker bees approaches

    Flowshop scheduling using artificial bee colony (ABC) algorithm with varying onlooker bees approaches by Mohd Pauzi, Nur Fazlinda

    Published 2015
    “…Artificial Bee Colony (ABC) algorithm is one of the methods used to solve the flowshop scheduling problem but only a few researches have been found using this method in this area. …”
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  6. 6
    Implementation of Color Filtering on FPGA

    Implementation of Color Filtering on FPGA by Mohd Shukor, Mohd Nasir, Lo, H. H., Sebastian, Patrick

    Published 2007
    “…The objective of this paper is to construct a real time hardware image processing system on Field Programmable Gate Array (FPGA). The chosen image processing algorithm is a single Color Filtering algorithm. …”
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  7. 7
    An experimental validation and optimisation tool path strategy for thin walled structure

    An experimental validation and optimisation tool path strategy for thin walled structure by Alsultaney, Hazem K., Mohd Ariffin, Mohd Khairol Anuar, Baharudin, B. T. Hang Tuah, Ali, Aidy, Mustapha, Faizal

    Published 2011
    “…The target was to develop models which mimic the actual cutting process using the finite element method (FEM), to validate the developed tool path strategy algorithm with the actual machining process and to programme the developed algorithm into the software. …”
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  8. 8
    Automatic Classification of Cervix Type

    Automatic Classification of Cervix Type by Muktiar Singh, Jasdeep Singh

    Published 2019
    “…Due to that, in this study, few algorithms were developed by using image classification methods to correctly classify the cervix types based on cervical images by using segmentation and classification method. …”
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  9. 9
    Develpoment of combinatorial optimisation for cutting tool path strategy

    Develpoment of combinatorial optimisation for cutting tool path strategy by Alsultaney, Hazem K., Mohd Ariffin, Mohd Khairol Anuar, Baharudin, B. T. Hang Tuah, Ali, Aidy, Mustapha, Faizal

    Published 2009
    “…The target was to develop models which mimic the actual cutting process using the Finite Element Method (FEM) and to validate the developed tool path strategy algorithm with the actual machining process and to programmer the developed algorithm into software. …”
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  10. 10
    Design and implementation of multimedia digital matrix system

    Design and implementation of multimedia digital matrix system by Chui, Yew Leong, Ramli, Abdul Rahman, Perumal, Thinagaran, Sulaiman, Mohd Yusof, Ali, Mohd Liakot

    Published 2005
    “…The hybrid-reset algorithm is successfully solved the most well known problem of channel synchronization in data oversampling method. …”
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  11. 11
    Design and analysis of high performance matrix filling for DNA sequence alignment accelerator using asic design flow: article / Nurzaima Mahmod

    Design and analysis of high performance matrix filling for DNA sequence alignment accelerator using asic design flow: article / Nurzaima Mahmod by Mahmod, Nurzaima

    “…To optimize the performance of the algorithm by exploiting parallelism in the design several techniques have been developed. …”
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  12. 12
    Optimal sizing and location of distributed generation for power loss minimization using bee colony algorithm

    Optimal sizing and location of distributed generation for power loss minimization using bee colony algorithm by Mohamad Zunnurain Fauzi

    Published 2023
    “…Therefore, a method which is Artificial Bee Colony (ABC) algorithm is proposed in this project for the optimal location and size of DG used in minimizing power losses and improve voltage profile. …”
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  13. 13
    Web based clustering tool using K-MEAN++ algorithm / Muhammad Nur Syazwanie Aznan

    Web based clustering tool using K-MEAN++ algorithm / Muhammad Nur Syazwanie Aznan by Aznan, Muhammad Nur Syazwanie Aznan

    Published 2019
    “…This project will use the rapid application development (RAD) methodology since this are the most suitable method for developing the system. …”
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  14. 14
    Implementation of color filtering on FPGA

    Implementation of color filtering on FPGA by P., Sebastian, M.N.B.M., Shukor, H.H., Lo

    Published 2007
    “…The objective of this paper is to construct a real time hardware image processing system on Field Programmable Gate Array (FPGA). The chosen image processing algorithm is a single Color Filtering algorithm. …”
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  15. 15
    Design and analysis of high performance matrix filling for DNA sequence alignment accelerator using ASIC design flow / Nurzaima Mahmod

    Design and analysis of high performance matrix filling for DNA sequence alignment accelerator using ASIC design flow / Nurzaima Mahmod by Mahmod, Nurzaima

    Published 2010
    “…To optimize the performance of the algorithm by exploiting parallelism in the design several techniques have been developed. …”
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  16. 16
    Hardware Design Of Random Number Generator And Random Walk-Onboundary Algorithm To Compute Unit Cube Capacitance In Fpga

    Hardware Design Of Random Number Generator And Random Walk-Onboundary Algorithm To Compute Unit Cube Capacitance In Fpga by Niun, Cheah How

    Published 2016
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  17. 17
    Multi-directional matrix converter for low power application using field-programmable gate array

    Multi-directional matrix converter for low power application using field-programmable gate array by Toosi, Saman

    Published 2015
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  18. 18
    The development of embedded band-stop filter for vibration control of a flexible manipulator

    The development of embedded band-stop filter for vibration control of a flexible manipulator by Noor Hazreen, Sutomoh

    Published 2009
    “…After that, it is embedded in Field Programmable Gate Array board using Xilinx software. …”
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  19. 19
    Implementation of Hybrid Indexing, Clustering and Classification Methods to Enhance Rural Development Programme in South Sulawesi

    Implementation of Hybrid Indexing, Clustering and Classification Methods to Enhance Rural Development Programme in South Sulawesi by Muhammad, Faisal

    Published 2024
    “…The village assistance programme can motivate and engage rural communities during the participatory and transparent phase of village development. …”
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  20. 20
    The development of embedded low-pass filter for vibration control of a flexible manipulator

    The development of embedded low-pass filter for vibration control of a flexible manipulator by Aainaa Hazwani, Mohd Hashim

    Published 2009
    “…After that, it is embedded in Field Programmable Gate Array (FPGA) board using Xilinx ISE 10.1 software. …”
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