Search Results - (( development programme encryption algorithm ) OR ( java implementation level algorithm ))

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  1. 1

    Design of an advanced encryption standard crypto-processor core for field programmable gate array implementation by Ismail, Mohd. Izuan

    Published 2006
    “…The proposed AES Crypto-Processor accelerates the AES algorithm in reconfigurable Field Programmable Gate Arrays (FPGA). …”
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    Thesis
  2. 2

    Enhancing performance of XTS cryptography mode of operation using parallel design by Ahmed Alomari, Mohammad

    Published 2009
    “…Performance evaluation shows that XTS exhibits faster speed when an RC6 encryption algorithm is used, compared to other encryption algorithms such as AES and Twofish. …”
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    Thesis
  3. 3

    Design and Implementation of Advanced Encryption Standard Using Verilog HDL by Shamsiah, Suhaili, Rene Brooke, Fredrick, Zainah, Md. Zain, Norhuzaimin, Julai

    Published 2020
    “…The focus of this paper is to match with the existing cryptography algorithm, 128-bit Advanced Encryption Algorithm and improving the processing speed for the design with hardware implementation. …”
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    Article
  4. 4

    Design and implementation of advanced encryption standard using verilog HDL by Shamsiah, Suhaili, Fredrick, Rene Brooke, Zainah, Md. Zain, Norhuzaimin, Julai

    Published 2022
    “…The focus of this paper is to match with the existing cryptography algorithm, 128-bit Advanced Encryption Algorithm and improving the processing speed for the design with hardware implementation. …”
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    Conference or Workshop Item
  5. 5

    AUTOMATED MODEL GENERATION OF FSM AND NUSMV MODEL FROM RSA JAVA SOURCE CODE FOR MODEL CHECKING by SALLEH AL-HUMAIKANI, MOHAMMED ABDULQAWI

    Published 2021
    “…The encryption algorithms are playing an important part in the protection level for data. …”
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    Thesis
  6. 6
  7. 7

    Implementation of (AES) Advanced Encryption Standard algorithm in communication application by Moh, Heng Huong

    Published 2014
    “…Internet communication has become more common in this modern world recently, and one of the important algorithms used is ABS algorithm. However, most of the users have inadequate knowledge and understanding regard to this algorithm implementation in the communication field, as well as the level of security and accuracy will be questioned by the users because of the necessary to maintain the confidentiality of particular data transferred. …”
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    Undergraduates Project Papers
  8. 8

    Implementation of locust inspired scheduling algorithm with huge number of servers for energy efficiency in a cloud datacenter by Azhar, Nur Huwaina

    Published 2019
    “…It does not consider the LACE algorithm implemented in huge number of server in one Cloud datacenter. …”
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    Thesis
  9. 9

    A Model for Evaluation of Cryptography Algorithm on UUM Portal by Norliana, Abdul Majid

    Published 2004
    “…Level one is the development of userID and password, level two involve the insertion of the testing parameter speed coding. …”
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  10. 10

    Comparison of Search Algorithms in Javanese-Indonesian Dictionary Application by Yana Aditia, Gerhana, Nur, Lukman, Arief Fatchul, Huda, Cecep Nurul, Alam, Undang, Syaripudin, Devi, Novitasari

    Published 2020
    “…Performance Testing is used to test the performance of algorithm implementations in applications. The test results show that the Boyer Moore and Knuth Morris Pratt algorithms have an accuracy rate of 100%, and the Horspool algorithm 85.3%. …”
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    Journal
  11. 11

    An improved RSA cryptosystem based on thread and CRT / Saheed Yakub Kayode and Gbolagade Kazeem Alagbe by Yakub Kayode, Saheed, Kazeem Alagbe, Gbolagade

    Published 2017
    “…We use a parallel technique that divides RSA power process into seperate threads and employs the use of Chinese Remainder Theorem (CRT) to decrease the time required for both encryption and decryption operation. Java programming language is used to implement the algorithm. …”
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    Article
  12. 12

    Cryptographic protection of block-oriented storage devices using AES-XTS in FPGA by Ahmed, Shakil

    Published 2013
    “…Also the parallel AES-XTS encryption and decryption design were used to develop integrated chip of AES-XTS on FPGA. …”
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    Thesis
  13. 13

    Design and Implementation of Data-at-Rest Encryption for Hadoop by Wan Nor Shuhadah, Wan Nik, Mohamad Afendee, Mohamed, Zarina, Mohamad, Siti Hanisah, Kamaruzaman

    Published 2017
    “…Therefore, the AES encryption algorithm has been implemented in HDFS to ensure the security of data stored in HDFS. …”
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    Conference or Workshop Item
  14. 14

    Design and Implementation of Data-at-Rest Encryption for Hadoop by Wan Nor Shuhadah, Wan Nik, Mohamad Afendee, Mohamed, Zarina, Mohamad, Siti Hanisah, Kamaruzaman

    Published 2017
    “…Therefore, the AES encryption algorithm has been implemented in HDFS to ensure the security of data stored in HDFS. …”
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    Conference or Workshop Item
  15. 15

    Implementation of High Speed Large Integer Multiplication Algorithm on Contemporary Architecture by Chang, Boon Chiao

    Published 2018
    “…CPU implementations are becoming less efficient in handling the computation of crypto algorithms. Hence, other contemporary processor architectures such as GPU and FPGA have become popular alternative to speed up the computation in recent years.This dissertation first discusses several existing large integer multiplication algorithms and reviews different methods used to implement thediscussed algorithms done by other researchers in both Graphic Processing Unit (GPU) and Field Programmable Gate Array (FPGA).Compared to GPU, FPGA offered more low level design and development to the implementation. …”
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    Final Year Project / Dissertation / Thesis
  16. 16

    Towards Maximising Hardware Resources and Design Efficiency via High-Speed Implementation of HMAC based on SHA-256 Design by Shamsiah, Suhaili, Norhuzaimin, Julai, Rohana, Sapawi, Nordiana, Rajaee

    Published 2024
    “…It was successfully developed using Verilog Hardware Description Language (HDL) code with the implementation of a Field Programmable Gate Array (FPGA) device using the Altera Quartus II Computer-Aided Design (CAD) tool to enhance the maximum frequency of the design. …”
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    Article
  17. 17

    Towards Maximising Hardware Resources and Design Efficiency via High-Speed Implementation of HMAC based on SHA-256 Design by Shamsiah, Suhaili, Norhuzaimin, Julai, Rohana, Sapawi, Nordiana, Rajaee

    Published 2024
    “…It was successfully developed using Verilog Hardware Description Language (HDL) code with the implementation of a Field Programmable Gate Array (FPGA) device using the Altera Quartus II Computer-Aided Design (CAD) tool to enhance the maximum frequency of the design. …”
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    Article
  18. 18

    Secure E-Voting With Blind Signature by Ibrahim, Subariah, Kamat, Maznah, Salleh, Mazleena, Abdul Aziz, Shah Rizan

    Published 2003
    “…In this system, voter’s privacy is guaranteed by using a blind signature for confidentiality and voter’s digital signature for voter’s authentication. E-Voting is implemented by employing Java socket technology and BouncyCastle cryptography provider. …”
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    Conference or Workshop Item
  19. 19

    Enhancing obfuscation technique for protecting source code against software reverse engineering by Mahfoudh, Asma

    Published 2019
    “…There is also a need to develop a tool that contains the three approaches where the developer can customize the protection of the source code.…”
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    Thesis
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