Search Results - (( development programme encryption algorithm ) OR ( java feature selection algorithm ))
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1
Design of an advanced encryption standard crypto-processor core for field programmable gate array implementation
Published 2006“…The proposed AES Crypto-Processor accelerates the AES algorithm in reconfigurable Field Programmable Gate Arrays (FPGA). …”
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2
Enhancing performance of XTS cryptography mode of operation using parallel design
Published 2009“…Performance evaluation shows that XTS exhibits faster speed when an RC6 encryption algorithm is used, compared to other encryption algorithms such as AES and Twofish. …”
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3
Design and Implementation of Advanced Encryption Standard Using Verilog HDL
Published 2020“…The focus of this paper is to match with the existing cryptography algorithm, 128-bit Advanced Encryption Algorithm and improving the processing speed for the design with hardware implementation. …”
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Design and implementation of advanced encryption standard using verilog HDL
Published 2022“…The focus of this paper is to match with the existing cryptography algorithm, 128-bit Advanced Encryption Algorithm and improving the processing speed for the design with hardware implementation. …”
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5
An ensemble learning method for spam email detection system based on metaheuristic algorithms
Published 2015“…In comparison to different single algorithms for feature selection,experimental results show that the proposed ensemble method is able to reduce dimensionality, the number of irrelevant features and produce reasonable classifier accuracy. …”
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6
Features selection for intrusion detection system using hybridize PSO-SVM
Published 2016“…Genetic algorithm GA had been adopted to perform features selection method; however, this method could not deliver an acceptable detection rate, lower accuracy, and higher false alarm rates. …”
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7
A Toolkit for Simulation of Desktop Grid Environment
Published 2014“…The prototypes will be developed using JAVA language united with a MySQL database. Core functionality of the simulator are job generation, volunteer generation, simulating algorithms, generating graphical charts and generating reports. …”
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A multi-filter feature selection in detecting distributed denial-of-service attack
Published 2019“…It consists of 3-stage procedures: feature ranking, feature selection and classification. …”
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Software metrics selection model for predicting maintainability of object-oriented software using genetic algorithms
Published 2016“…The latest effort to solve this selection problem is the development of the metrics selection model that uses genetic algorithm (GA). …”
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11
A Feature Ranking Algorithm in Pragmatic Quality Factor Model for Software Quality Assessment
Published 2013“…This thesis describes original research in the field of software quality model by presenting a Feature Ranking Algorithm (FRA) for Pragmatic Quality Factor (PQF) model. …”
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12
Cryptographic protection of block-oriented storage devices using AES-XTS in FPGA
Published 2013“…Also the parallel AES-XTS encryption and decryption design were used to develop integrated chip of AES-XTS on FPGA. …”
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Implementation of High Speed Large Integer Multiplication Algorithm on Contemporary Architecture
Published 2018“…CPU implementations are becoming less efficient in handling the computation of crypto algorithms. Hence, other contemporary processor architectures such as GPU and FPGA have become popular alternative to speed up the computation in recent years.This dissertation first discusses several existing large integer multiplication algorithms and reviews different methods used to implement thediscussed algorithms done by other researchers in both Graphic Processing Unit (GPU) and Field Programmable Gate Array (FPGA).Compared to GPU, FPGA offered more low level design and development to the implementation. …”
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Visdom: Smart guide robot for visually impaired people
Published 2025“…An Android mobile application, developed using Java and the java.net.Socket library, provides an intuitive and accessible user interface for seamless interaction with the robot. …”
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Towards Maximising Hardware Resources and Design Efficiency via High-Speed Implementation of HMAC based on SHA-256 Design
Published 2024“…It was successfully developed using Verilog Hardware Description Language (HDL) code with the implementation of a Field Programmable Gate Array (FPGA) device using the Altera Quartus II Computer-Aided Design (CAD) tool to enhance the maximum frequency of the design. …”
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Towards Maximising Hardware Resources and Design Efficiency via High-Speed Implementation of HMAC based on SHA-256 Design
Published 2024“…It was successfully developed using Verilog Hardware Description Language (HDL) code with the implementation of a Field Programmable Gate Array (FPGA) device using the Altera Quartus II Computer-Aided Design (CAD) tool to enhance the maximum frequency of the design. …”
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A malware analysis and detection system for mobile devices / Ali Feizollah
Published 2017“…We extracted 30 different features from network traffic. We then used feature selection algorithms and deep learning algorithms to build a detection model. …”
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Smart student timetable planner
Published 2025“…The project scope encompasses features such as secure login, course selection with conflict detection, timetable history, comparison between auto-generated and manual schedules, collaboration modules, and export functionality. …”
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Enhancing obfuscation technique for protecting source code against software reverse engineering
Published 2019“…There is also a need to develop a tool that contains the three approaches where the developer can customize the protection of the source code.…”
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Challenges of hidden data in the unused area two within executable files
Published 2009“…Problem statement: The executable files are one of the most important files in operating systems and in most systems designed by developers (programmers/software engineers), and then hiding information in these file is the basic goal for this study, because most users of any system cannot alter or modify the content of these files. …”
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