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  1. 1
    Design of an advanced encryption standard crypto-processor core for field programmable gate array implementation

    Design of an advanced encryption standard crypto-processor core for field programmable gate array implementation by Ismail, Mohd. Izuan

    Published 2006
    “…The proposed AES Crypto-Processor accelerates the AES algorithm in reconfigurable Field Programmable Gate Arrays (FPGA). …”
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  2. 2
    Enhancing performance of XTS cryptography mode of operation using parallel design

    Enhancing performance of XTS cryptography mode of operation using parallel design by Ahmed Alomari, Mohammad

    Published 2009
    “…Performance evaluation shows that XTS exhibits faster speed when an RC6 encryption algorithm is used, compared to other encryption algorithms such as AES and Twofish. …”
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  3. 3
    Design and Implementation of Advanced Encryption Standard Using Verilog HDL

    Design and Implementation of Advanced Encryption Standard Using Verilog HDL by Shamsiah, Suhaili, Rene Brooke, Fredrick, Zainah, Md. Zain, Norhuzaimin, Julai

    Published 2020
    “…The focus of this paper is to match with the existing cryptography algorithm, 128-bit Advanced Encryption Algorithm and improving the processing speed for the design with hardware implementation. …”
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  4. 4
    Design and implementation of advanced encryption standard using verilog HDL

    Design and implementation of advanced encryption standard using verilog HDL by Shamsiah, Suhaili, Fredrick, Rene Brooke, Zainah, Md. Zain, Norhuzaimin, Julai

    Published 2022
    “…The focus of this paper is to match with the existing cryptography algorithm, 128-bit Advanced Encryption Algorithm and improving the processing speed for the design with hardware implementation. …”
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  5. 5
    Implementation of PRINCE algorithm in FPGA

    Implementation of PRINCE algorithm in FPGA by Abbas Y.A., Jidin R., Jamil N., Z'aba M.R., Rusli M.E., Tariq B.

    Published 2023
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  6. 6
    A performance analysis of association rule mining algorithms

    A performance analysis of association rule mining algorithms by Fageeri, S.O., Ahmad, R., Alhussian, H.

    Published 2016
    “…The results of the CPU profiler of Java VisualVM showed that Binary-Based algorithm performs better than Eclat algorithm in-terms of both execution times and memory usage. …”
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  7. 7
    Automatic Number Plate Recognition on android platform: With some Java code excerpts

    Automatic Number Plate Recognition on android platform: With some Java code excerpts by ., Abdul Mutholib, Gunawan, Teddy Surya, Kartiwi, Mira

    Published 2016
    “…Performance of the proposed algorithm was evaluated on the developed number plates’ image database captured by mobile phone’s camera, i.e. 30 images. …”
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  8. 8
    Cryptographic protection of block-oriented storage devices using AES-XTS in FPGA

    Cryptographic protection of block-oriented storage devices using AES-XTS in FPGA by Ahmed, Shakil

    Published 2013
    “…Also the parallel AES-XTS encryption and decryption design were used to develop integrated chip of AES-XTS on FPGA. …”
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  9. 9
    An approach for cross-site scripting detection and removal based on genetic algorithms.

    An approach for cross-site scripting detection and removal based on genetic algorithms. by Hydara, Isatou, Md Sultan, Abu Bakar, Zulzalil, Hazura, Admodisastro, Novia

    Published 2014
    “…The proposed approach is, so far, only implemented and validated on Java-based Web applications, although it can be implemented in other programming languages with slight modifications. …”
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  10. 10
    Implementation of High Speed Large Integer Multiplication Algorithm on Contemporary Architecture

    Implementation of High Speed Large Integer Multiplication Algorithm on Contemporary Architecture by Chang, Boon Chiao

    Published 2018
    “…CPU implementations are becoming less efficient in handling the computation of crypto algorithms. Hence, other contemporary processor architectures such as GPU and FPGA have become popular alternative to speed up the computation in recent years.This dissertation first discusses several existing large integer multiplication algorithms and reviews different methods used to implement thediscussed algorithms done by other researchers in both Graphic Processing Unit (GPU) and Field Programmable Gate Array (FPGA).Compared to GPU, FPGA offered more low level design and development to the implementation. …”
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  11. 11
    Cross-site scripting detection based on an enhanced genetic algorithm

    Cross-site scripting detection based on an enhanced genetic algorithm by Hydara, Isatou, Md Sultan, Abu Bakar, Zulzalil, Hazura, Admodisastro, Novia Indriaty

    Published 2015
    “…The proposed approach is, so far, only implemented and validated on Java-based Web applications, although it can be implemented in other programming languages with slight modifications. …”
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  12. 12
    A Feature Ranking Algorithm in Pragmatic Quality Factor Model for Software Quality Assessment

    A Feature Ranking Algorithm in Pragmatic Quality Factor Model for Software Quality Assessment by Ruzita, Ahmad

    Published 2013
    “…Therefore, FRA using FRT was constructed and the performance of the FRA was evaluated. The methodology used consists of theoretical study, design of formal framework on intelligent software quality, identification of Feature Ranking Technique (FRT), construction and evaluation of FRA algorithm. …”
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  13. 13
    Towards Maximising Hardware Resources and Design Efficiency via High-Speed Implementation of HMAC based on SHA-256 Design

    Towards Maximising Hardware Resources and Design Efficiency via High-Speed Implementation of HMAC based on SHA-256 Design by Shamsiah, Suhaili, Norhuzaimin, Julai, Rohana, Sapawi, Nordiana, Rajaee

    Published 2024
    “…It was successfully developed using Verilog Hardware Description Language (HDL) code with the implementation of a Field Programmable Gate Array (FPGA) device using the Altera Quartus II Computer-Aided Design (CAD) tool to enhance the maximum frequency of the design. …”
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  14. 14
    Towards Maximising Hardware Resources and Design Efficiency via High-Speed Implementation of HMAC based on SHA-256 Design

    Towards Maximising Hardware Resources and Design Efficiency via High-Speed Implementation of HMAC based on SHA-256 Design by Shamsiah, Suhaili, Norhuzaimin, Julai, Rohana, Sapawi, Nordiana, Rajaee

    Published 2024
    “…It was successfully developed using Verilog Hardware Description Language (HDL) code with the implementation of a Field Programmable Gate Array (FPGA) device using the Altera Quartus II Computer-Aided Design (CAD) tool to enhance the maximum frequency of the design. …”
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  15. 15
    Adoption of machine learning algorithm for analysing supporters and non supporters feedback on political posts / Ogunfolajin Maruff Tunde

    Adoption of machine learning algorithm for analysing supporters and non supporters feedback on political posts / Ogunfolajin Maruff Tunde by Ogunfolajin Maruff , Tunde

    Published 2022
    “…The method was implemented using Java and the results of the simulation were evaluated using five standard performance metrics: accuracy, AUC, precision, recall, and f-Measure. …”
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  16. 16
    Enhancement of Ant Colony Optimization for Grid Job Scheduling and Load Balancing

    Enhancement of Ant Colony Optimization for Grid Job Scheduling and Load Balancing by Husna, Jamal Abdul Nasir

    Published 2011
    “…A simulation environment was developed using Java programming to test the performance of the proposed EACO algorithm against existing grid resource management algorithms such as Antz algorithm, Particle Swarm Optimization algorithm, Space Shared algorithm and Time Shared algorithm, in terms of processing time and resource utilization. …”
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  17. 17
    An ensemble learning method for spam email detection system based on metaheuristic algorithms

    An ensemble learning method for spam email detection system based on metaheuristic algorithms by Behjat, Amir Rajabi

    Published 2015
    “…Recently, various techniques based on different algorithms have been developed. …”
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  18. 18
    Batch mode heuristic approaches for efficient task scheduling in grid computing system

    Batch mode heuristic approaches for efficient task scheduling in grid computing system by Maipan-Uku, Jamilu Yahaya

    Published 2016
    “…We simulate our proposed algorithms using a Java based simulator that is purposedly built for Grid computing simulations. …”
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  19. 19
    Software metrics selection model for predicting maintainability of object-oriented software using genetic algorithms

    Software metrics selection model for predicting maintainability of object-oriented software using genetic algorithms by Bakar, Abubakar Diwani

    Published 2016
    “…The software metric thresholds were used as indication for identifying unsafe design in software engineering. To evaluate this technique, an experiment was conducted on two geospatial systems developed using Java programming language where the Chidamber and Kemerer (CK) metrics were used. …”
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  20. 20
    Enhancing obfuscation technique for protecting source code against software reverse engineering

    Enhancing obfuscation technique for protecting source code against software reverse engineering by Mahfoudh, Asma

    Published 2019
    “…There is also a need to develop a tool that contains the three approaches where the developer can customize the protection of the source code.…”
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