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  1. 1
    Design of an advanced encryption standard crypto-processor core for field programmable gate array implementation

    Design of an advanced encryption standard crypto-processor core for field programmable gate array implementation by Ismail, Mohd. Izuan

    Published 2006
    “…The proposed AES Crypto-Processor accelerates the AES algorithm in reconfigurable Field Programmable Gate Arrays (FPGA). …”
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  2. 2
    Enhancing performance of XTS cryptography mode of operation using parallel design

    Enhancing performance of XTS cryptography mode of operation using parallel design by Ahmed Alomari, Mohammad

    Published 2009
    “…Performance evaluation shows that XTS exhibits faster speed when an RC6 encryption algorithm is used, compared to other encryption algorithms such as AES and Twofish. …”
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  3. 3
    Design and Implementation of Advanced Encryption Standard Using Verilog HDL

    Design and Implementation of Advanced Encryption Standard Using Verilog HDL by Shamsiah, Suhaili, Rene Brooke, Fredrick, Zainah, Md. Zain, Norhuzaimin, Julai

    Published 2020
    “…The focus of this paper is to match with the existing cryptography algorithm, 128-bit Advanced Encryption Algorithm and improving the processing speed for the design with hardware implementation. …”
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  4. 4
    Design and implementation of advanced encryption standard using verilog HDL

    Design and implementation of advanced encryption standard using verilog HDL by Shamsiah, Suhaili, Fredrick, Rene Brooke, Zainah, Md. Zain, Norhuzaimin, Julai

    Published 2022
    “…The focus of this paper is to match with the existing cryptography algorithm, 128-bit Advanced Encryption Algorithm and improving the processing speed for the design with hardware implementation. …”
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  5. 5
    AUTOMATED MODEL GENERATION OF FSM AND NUSMV MODEL FROM RSA JAVA SOURCE CODE FOR MODEL CHECKING

    AUTOMATED MODEL GENERATION OF FSM AND NUSMV MODEL FROM RSA JAVA SOURCE CODE FOR MODEL CHECKING by SALLEH AL-HUMAIKANI, MOHAMMED ABDULQAWI

    Published 2021
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  6. 6
    Implementation of PRINCE algorithm in FPGA

    Implementation of PRINCE algorithm in FPGA by Abbas Y.A., Jidin R., Jamil N., Z'aba M.R., Rusli M.E., Tariq B.

    Published 2023
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  7. 7
    Provider independent cryptographic tools

    Provider independent cryptographic tools by Ibrahim, Subariah, Salleh, Mazleena, Abdul Aziz, Shah Rizan

    Published 2003
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  8. 8
    Optimization of blood vessel detection in retina images using multithreading and native code for portable devices

    Optimization of blood vessel detection in retina images using multithreading and native code for portable devices by Tran, Duc Ngoc, Hussin, Fawnizu Azmadi, Yusoff, Mohd Zuki

    Published 2013
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  9. 9
    Real-time algorithmic music composition application.

    Real-time algorithmic music composition application. by Yap, Alisa Yi Hui

    Published 2022
    “…This project is about the study of evolutionary music, and focuses on the development of an algorithmic music composer using the Java programming language. …”
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  10. 10
    Cryptographic protection of block-oriented storage devices using AES-XTS in FPGA

    Cryptographic protection of block-oriented storage devices using AES-XTS in FPGA by Ahmed, Shakil

    Published 2013
    “…Also the parallel AES-XTS encryption and decryption design were used to develop integrated chip of AES-XTS on FPGA. …”
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  11. 11
    Direct approach for mining association rules from structured XML data

    Direct approach for mining association rules from structured XML data by Abazeed, Ashraf Riad

    Published 2012
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  12. 12
    A Model for Evaluation of Cryptography Algorithm on UUM Portal

    A Model for Evaluation of Cryptography Algorithm on UUM Portal by Norliana, Abdul Majid

    Published 2004
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  13. 13
    Implementation of High Speed Large Integer Multiplication Algorithm on Contemporary Architecture

    Implementation of High Speed Large Integer Multiplication Algorithm on Contemporary Architecture by Chang, Boon Chiao

    Published 2018
    “…CPU implementations are becoming less efficient in handling the computation of crypto algorithms. Hence, other contemporary processor architectures such as GPU and FPGA have become popular alternative to speed up the computation in recent years.This dissertation first discusses several existing large integer multiplication algorithms and reviews different methods used to implement thediscussed algorithms done by other researchers in both Graphic Processing Unit (GPU) and Field Programmable Gate Array (FPGA).Compared to GPU, FPGA offered more low level design and development to the implementation. …”
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  14. 14
    Fitness value based evolution algorithm approach for text steganalysis model

    Fitness value based evolution algorithm approach for text steganalysis model by Din, Roshidi, Samsudin, Azman, Tuan Muda, Tuan Zalizam, Lertkrai, P., Amphawan, Angela, Omar, Mohd Nizam

    Published 2013
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  15. 15
    A Toolkit for Simulation of Desktop Grid Environment

    A Toolkit for Simulation of Desktop Grid Environment by FOROUSHAN, PAYAM CHINI

    Published 2014
    “…In this type of environment it is nearly impossible to prove the effectiveness of a scheduling algorithm. Hence the main objective of this study is to develop a desktop grid simulator toolkit for measuring and modeling scheduler algorithm performance. …”
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  16. 16
    Secure Image Steganography Using Encryption Algorithm

    Secure Image Steganography Using Encryption Algorithm by Siti Dhalila, Mohd Satar, Roslinda, Muda, Fatimah, Ghazali, Mustafa, Mamat, Nazirah, Abd Hamid, An, P.K

    Published 2016
    “…The objective of this study is to enhance the confidentiality and security of the image steganography application by combining cryptography algorithm. In this proposed model, the RSA algorithm is used to encrypt a secret message into an unreadable ciphertext before hiding it in the image. …”
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  17. 17
    A Feature Ranking Algorithm in Pragmatic Quality Factor Model for Software Quality Assessment

    A Feature Ranking Algorithm in Pragmatic Quality Factor Model for Software Quality Assessment by Ruzita, Ahmad

    Published 2013
    “…This thesis describes original research in the field of software quality model by presenting a Feature Ranking Algorithm (FRA) for Pragmatic Quality Factor (PQF) model. …”
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  18. 18
    Parallel distributed genetic algorithm development based on microcontrollers framework

    Parallel distributed genetic algorithm development based on microcontrollers framework by Krishnan P.S., Kiong T.S., Koh J.

    Published 2023
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  19. 19
    Towards Maximising Hardware Resources and Design Efficiency via High-Speed Implementation of HMAC based on SHA-256 Design

    Towards Maximising Hardware Resources and Design Efficiency via High-Speed Implementation of HMAC based on SHA-256 Design by Shamsiah, Suhaili, Norhuzaimin, Julai, Rohana, Sapawi, Nordiana, Rajaee

    Published 2024
    “…It was successfully developed using Verilog Hardware Description Language (HDL) code with the implementation of a Field Programmable Gate Array (FPGA) device using the Altera Quartus II Computer-Aided Design (CAD) tool to enhance the maximum frequency of the design. …”
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  20. 20
    Towards Maximising Hardware Resources and Design Efficiency via High-Speed Implementation of HMAC based on SHA-256 Design

    Towards Maximising Hardware Resources and Design Efficiency via High-Speed Implementation of HMAC based on SHA-256 Design by Shamsiah, Suhaili, Norhuzaimin, Julai, Rohana, Sapawi, Nordiana, Rajaee

    Published 2024
    “…It was successfully developed using Verilog Hardware Description Language (HDL) code with the implementation of a Field Programmable Gate Array (FPGA) device using the Altera Quartus II Computer-Aided Design (CAD) tool to enhance the maximum frequency of the design. …”
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