Search Results - (( development programme encryption algorithm ) OR ( java application mining algorithm ))

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  1. 1
    Direct approach for mining association rules from structured XML data

    Direct approach for mining association rules from structured XML data by Abazeed, Ashraf Riad

    Published 2012
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  2. 2
    Design of an advanced encryption standard crypto-processor core for field programmable gate array implementation

    Design of an advanced encryption standard crypto-processor core for field programmable gate array implementation by Ismail, Mohd. Izuan

    Published 2006
    “…The proposed AES Crypto-Processor accelerates the AES algorithm in reconfigurable Field Programmable Gate Arrays (FPGA). …”
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  3. 3
    Enhancing performance of XTS cryptography mode of operation using parallel design

    Enhancing performance of XTS cryptography mode of operation using parallel design by Ahmed Alomari, Mohammad

    Published 2009
    “…Performance evaluation shows that XTS exhibits faster speed when an RC6 encryption algorithm is used, compared to other encryption algorithms such as AES and Twofish. …”
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  4. 4
    Separator Database and SPM Tree Framework for Mining Sequential Patterns Using Prefixspan with Pseudoprojection

    Separator Database and SPM Tree Framework for Mining Sequential Patterns Using Prefixspan with Pseudoprojection by Saputra , Dhany, Rambli, Dayang R.A., Foong, Oi Mean

    Published 2008
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  5. 5
    Design and Implementation of Advanced Encryption Standard Using Verilog HDL

    Design and Implementation of Advanced Encryption Standard Using Verilog HDL by Shamsiah, Suhaili, Rene Brooke, Fredrick, Zainah, Md. Zain, Norhuzaimin, Julai

    Published 2020
    “…The focus of this paper is to match with the existing cryptography algorithm, 128-bit Advanced Encryption Algorithm and improving the processing speed for the design with hardware implementation. …”
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  6. 6
    Design and implementation of advanced encryption standard using verilog HDL

    Design and implementation of advanced encryption standard using verilog HDL by Shamsiah, Suhaili, Fredrick, Rene Brooke, Zainah, Md. Zain, Norhuzaimin, Julai

    Published 2022
    “…The focus of this paper is to match with the existing cryptography algorithm, 128-bit Advanced Encryption Algorithm and improving the processing speed for the design with hardware implementation. …”
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  7. 7
    Study and Implementation of Data Mining in Urban Gardening

    Study and Implementation of Data Mining in Urban Gardening by Mohana, Muniandy, Lee, Eu Vern

    Published 2019
    “…Attached sensors generate data and send these data to the Java Servlet application through a WIFI module. These data are processed and stored in appropriate formats in a MySQL server database. …”
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  8. 8
    Implementation of PRINCE algorithm in FPGA

    Implementation of PRINCE algorithm in FPGA by Abbas Y.A., Jidin R., Jamil N., Z'aba M.R., Rusli M.E., Tariq B.

    Published 2023
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  9. 9
    Mining Sequential Patterns Using I-PrefixSpan

    Mining Sequential Patterns Using I-PrefixSpan by Dhany , Saputra, Rambli Dayang, R.A., Foong, Oi Mean

    Published 2007
    “…Sequential pattern mining is a relatively new data-mining problem with many areas of application. …”
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  10. 10
    A web-based implementation of k-means algorithms

    A web-based implementation of k-means algorithms by Lee, Quan

    Published 2022
    “…This stinginess of proximity measures in data mining tools is stifling the performance of the algorithm. …”
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  11. 11
    Mining Sequential Patterns using I-PrefixSpan

    Mining Sequential Patterns using I-PrefixSpan by Saputra , Dhany, Dayang R.A. Rambli, Foong, Oi Mean

    Published 2008
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  12. 12
    Cryptographic protection of block-oriented storage devices using AES-XTS in FPGA

    Cryptographic protection of block-oriented storage devices using AES-XTS in FPGA by Ahmed, Shakil

    Published 2013
    “…Also the parallel AES-XTS encryption and decryption design were used to develop integrated chip of AES-XTS on FPGA. …”
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  13. 13
    Implementation of High Speed Large Integer Multiplication Algorithm on Contemporary Architecture

    Implementation of High Speed Large Integer Multiplication Algorithm on Contemporary Architecture by Chang, Boon Chiao

    Published 2018
    “…CPU implementations are becoming less efficient in handling the computation of crypto algorithms. Hence, other contemporary processor architectures such as GPU and FPGA have become popular alternative to speed up the computation in recent years.This dissertation first discusses several existing large integer multiplication algorithms and reviews different methods used to implement thediscussed algorithms done by other researchers in both Graphic Processing Unit (GPU) and Field Programmable Gate Array (FPGA).Compared to GPU, FPGA offered more low level design and development to the implementation. …”
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  14. 14
    Features selection for intrusion detection system using hybridize PSO-SVM

    Features selection for intrusion detection system using hybridize PSO-SVM by Tabaan, Alaa Abdulrahman

    Published 2016
    “…The simulation will be carried on WEKA tool, which allows us to call some data mining methods under JAVA environment. The proposed model will be tested and evaluated on both NSL-KDD and KDD-CUP 99 using several performance metrics.…”
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  15. 15
    Towards Maximising Hardware Resources and Design Efficiency via High-Speed Implementation of HMAC based on SHA-256 Design

    Towards Maximising Hardware Resources and Design Efficiency via High-Speed Implementation of HMAC based on SHA-256 Design by Shamsiah, Suhaili, Norhuzaimin, Julai, Rohana, Sapawi, Nordiana, Rajaee

    Published 2024
    “…It was successfully developed using Verilog Hardware Description Language (HDL) code with the implementation of a Field Programmable Gate Array (FPGA) device using the Altera Quartus II Computer-Aided Design (CAD) tool to enhance the maximum frequency of the design. …”
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  16. 16
    Towards Maximising Hardware Resources and Design Efficiency via High-Speed Implementation of HMAC based on SHA-256 Design

    Towards Maximising Hardware Resources and Design Efficiency via High-Speed Implementation of HMAC based on SHA-256 Design by Shamsiah, Suhaili, Norhuzaimin, Julai, Rohana, Sapawi, Nordiana, Rajaee

    Published 2024
    “…It was successfully developed using Verilog Hardware Description Language (HDL) code with the implementation of a Field Programmable Gate Array (FPGA) device using the Altera Quartus II Computer-Aided Design (CAD) tool to enhance the maximum frequency of the design. …”
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  17. 17
    Enhancing obfuscation technique for protecting source code against software reverse engineering

    Enhancing obfuscation technique for protecting source code against software reverse engineering by Mahfoudh, Asma

    Published 2019
    “…There is also a need to develop a tool that contains the three approaches where the developer can customize the protection of the source code.…”
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  18. 18
    Challenges of hidden data in the unused area two within executable files

    Challenges of hidden data in the unused area two within executable files by Naji, Ahmed Wathik, Zaidan, A.A., Zaidan, B.B.

    Published 2009
    “…Problem statement: The executable files are one of the most important files in operating systems and in most systems designed by developers (programmers/software engineers), and then hiding information in these file is the basic goal for this study, because most users of any system cannot alter or modify the content of these files. …”
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