Search Results - (( development programme encryption algorithm ) OR ( java _ normalization algorithm ))

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  1. 1
    Challenges of hidden data in the unused area two within executable files

    Challenges of hidden data in the unused area two within executable files by Naji, Ahmed Wathik, Zaidan, A.A., Zaidan, B.B.

    Published 2009
    “…The designed algorithms were intended to help in proposed system aim to hide and retract information (data file) with in unused area 2 of any execution file(exe.file). …”
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  2. 2
    Design of an advanced encryption standard crypto-processor core for field programmable gate array implementation

    Design of an advanced encryption standard crypto-processor core for field programmable gate array implementation by Ismail, Mohd. Izuan

    Published 2006
    “…The proposed AES Crypto-Processor accelerates the AES algorithm in reconfigurable Field Programmable Gate Arrays (FPGA). …”
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  3. 3
    Enhancing performance of XTS cryptography mode of operation using parallel design

    Enhancing performance of XTS cryptography mode of operation using parallel design by Ahmed Alomari, Mohammad

    Published 2009
    “…Performance evaluation shows that XTS exhibits faster speed when an RC6 encryption algorithm is used, compared to other encryption algorithms such as AES and Twofish. …”
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  4. 4
    Design and Implementation of Advanced Encryption Standard Using Verilog HDL

    Design and Implementation of Advanced Encryption Standard Using Verilog HDL by Shamsiah, Suhaili, Rene Brooke, Fredrick, Zainah, Md. Zain, Norhuzaimin, Julai

    Published 2020
    “…The focus of this paper is to match with the existing cryptography algorithm, 128-bit Advanced Encryption Algorithm and improving the processing speed for the design with hardware implementation. …”
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  5. 5
    Design and implementation of advanced encryption standard using verilog HDL

    Design and implementation of advanced encryption standard using verilog HDL by Shamsiah, Suhaili, Fredrick, Rene Brooke, Zainah, Md. Zain, Norhuzaimin, Julai

    Published 2022
    “…The focus of this paper is to match with the existing cryptography algorithm, 128-bit Advanced Encryption Algorithm and improving the processing speed for the design with hardware implementation. …”
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  6. 6
    Implementation of PRINCE algorithm in FPGA

    Implementation of PRINCE algorithm in FPGA by Abbas Y.A., Jidin R., Jamil N., Z'aba M.R., Rusli M.E., Tariq B.

    Published 2023
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  7. 7
    Cryptographic protection of block-oriented storage devices using AES-XTS in FPGA

    Cryptographic protection of block-oriented storage devices using AES-XTS in FPGA by Ahmed, Shakil

    Published 2013
    “…Also the parallel AES-XTS encryption and decryption design were used to develop integrated chip of AES-XTS on FPGA. …”
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  8. 8
    Improving resource management with multi-instance broker scheduling algorithm in hierarchical grid computing

    Improving resource management with multi-instance broker scheduling algorithm in hierarchical grid computing by Yahaya, Bakri

    Published 2016
    “…The designed modules is in the form of algorithms, GridSim, Java Development Kits and Java Language used to support the design process whereas the Netbeans software serves as the platform to simulate the experiment so as to obtain the results. …”
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  9. 9
    Implementation of High Speed Large Integer Multiplication Algorithm on Contemporary Architecture

    Implementation of High Speed Large Integer Multiplication Algorithm on Contemporary Architecture by Chang, Boon Chiao

    Published 2018
    “…CPU implementations are becoming less efficient in handling the computation of crypto algorithms. Hence, other contemporary processor architectures such as GPU and FPGA have become popular alternative to speed up the computation in recent years.This dissertation first discusses several existing large integer multiplication algorithms and reviews different methods used to implement thediscussed algorithms done by other researchers in both Graphic Processing Unit (GPU) and Field Programmable Gate Array (FPGA).Compared to GPU, FPGA offered more low level design and development to the implementation. …”
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  10. 10
    SANAsms: Secure short messaging system for secure GSM mobile communication

    SANAsms: Secure short messaging system for secure GSM mobile communication by Anuar, N.B., Azlan, I.M., Wahid, A.W.A., Zakaria, O.

    Published 2008
    “…The system is developed using Java 2 Micro Edition (J2ME) which is written in Java. …”
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  11. 11
    Web-based clustering tool using fuzzy k-mean algorithm / Ahmad Zuladzlan Zulkifly

    Web-based clustering tool using fuzzy k-mean algorithm / Ahmad Zuladzlan Zulkifly by Zulkifly, Ahmad Zuladzlan

    Published 2019
    “…On the Construction phase, the development of the prototype has been started. All the algorithm for the engine has been developed by using Java script language. …”
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  12. 12
    Parallel distributed genetic algorithm development based on microcontrollers framework

    Parallel distributed genetic algorithm development based on microcontrollers framework by Krishnan P.S., Kiong T.S., Koh J.

    Published 2023
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  13. 13
    Towards Maximising Hardware Resources and Design Efficiency via High-Speed Implementation of HMAC based on SHA-256 Design

    Towards Maximising Hardware Resources and Design Efficiency via High-Speed Implementation of HMAC based on SHA-256 Design by Shamsiah, Suhaili, Norhuzaimin, Julai, Rohana, Sapawi, Nordiana, Rajaee

    Published 2024
    “…It was successfully developed using Verilog Hardware Description Language (HDL) code with the implementation of a Field Programmable Gate Array (FPGA) device using the Altera Quartus II Computer-Aided Design (CAD) tool to enhance the maximum frequency of the design. …”
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  14. 14
    Towards Maximising Hardware Resources and Design Efficiency via High-Speed Implementation of HMAC based on SHA-256 Design

    Towards Maximising Hardware Resources and Design Efficiency via High-Speed Implementation of HMAC based on SHA-256 Design by Shamsiah, Suhaili, Norhuzaimin, Julai, Rohana, Sapawi, Nordiana, Rajaee

    Published 2024
    “…It was successfully developed using Verilog Hardware Description Language (HDL) code with the implementation of a Field Programmable Gate Array (FPGA) device using the Altera Quartus II Computer-Aided Design (CAD) tool to enhance the maximum frequency of the design. …”
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  15. 15
    Features selection for intrusion detection system using hybridize PSO-SVM

    Features selection for intrusion detection system using hybridize PSO-SVM by Tabaan, Alaa Abdulrahman

    Published 2016
    “…Electing the best set of features will help to improve the classifier predictions in terms of the normal and abnormal pattern. The simulation will be carried on WEKA tool, which allows us to call some data mining methods under JAVA environment. …”
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  16. 16
    Enhancing obfuscation technique for protecting source code against software reverse engineering

    Enhancing obfuscation technique for protecting source code against software reverse engineering by Mahfoudh, Asma

    Published 2019
    “…There is also a need to develop a tool that contains the three approaches where the developer can customize the protection of the source code.…”
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  17. 17
    A multi-filter feature selection in detecting distributed denial-of-service attack

    A multi-filter feature selection in detecting distributed denial-of-service attack by Yon, Yi Jun, Leau, Yu-Beng, Suraya Alias, Park, Yong Jin

    Published 2019
    “…In addition, the proposed M2FS method is developed through WEKA API with Java Programming language using the IDE of Eclipse Java. …”
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  18. 18
    Anfis Modelling On Diabetic Ketoacidosis For Unrestricted Food Intake Conditions

    Anfis Modelling On Diabetic Ketoacidosis For Unrestricted Food Intake Conditions by Saraswati, Galuh Wilujeng

    Published 2017
    “…The project has also implemented the optimization process onto the proposed ANFIS model through the hybrid of Genetic Algorithm on the fuzzy membership function of the ANFIS model. …”
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