Search Results - (( development programme detection algorithm ) OR ( java implementation modified algorithm ))

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  1. 1
    Challenges of hidden data in the unused area two within executable files

    Challenges of hidden data in the unused area two within executable files by Naji, Ahmed Wathik, Zaidan, A.A., Zaidan, B.B.

    Published 2009
    “…Results: The programs were coded in Java computer language and implemented on Pentium PC. …”
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  2. 2
    Direct approach for mining association rules from structured XML data

    Direct approach for mining association rules from structured XML data by Abazeed, Ashraf Riad

    Published 2012
    “…The thesis also provides a two different implementation of the modified FLEX algorithm using a java based parsers and XQuery implementation. …”
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    Thesis
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  3. 3
    OPTIMIZED MIN-MIN TASK SCHEDULING ALGORITHM FOR SCIENTIFIC WORKFLOWS IN A CLOUD ENVIRONMENT

    OPTIMIZED MIN-MIN TASK SCHEDULING ALGORITHM FOR SCIENTIFIC WORKFLOWS IN A CLOUD ENVIRONMENT by Murad S.S., Badeel R., Alsandi N.S.A., Alshaaya R.F., Ahmed R.A., Muhammed A., Derahman M.

    Published 2023
    “…To achieve this, we propose a new noble mechanism called Optimized Min-Min (OMin-Min) algorithm, inspired by the Min-Min algorithm. The objectives of this work are: i) to provide a comprehensive review of the cloud and scheduling process; ii) to classify the scheduling strategies and scientific workflows; iii) to implement our proposed algorithm with various scheduling algorithms (i.e., Min-Min, Round-Robin, Max-Min, and Modified Max-Min) for performance comparison, within different cloudlet sizes (i.e., small, medium, large, and heavy) in three scientific workflows (i.e., Montage, Epigenomics, and SIPHT); and iv) to investigate the performance of the implemented algorithms by using CloudSim. …”
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  4. 4
    Prevention And Detection Mechanism For Security In Passive Rfid System

    Prevention And Detection Mechanism For Security In Passive Rfid System by Khor, Jing Huey

    Published 2013
    “…The proposed protocol is designed with lightweight cryptographic algorithm, including XOR, Hamming distance, rotation and a modified linear congruential generator (MLCG). …”
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  5. 5
    Real time motorcycle image detections on field programmable gate array

    Real time motorcycle image detections on field programmable gate array by Mat Nong, Mohd Ali, Osman, Rosiah, Md Yusof, Juraina, Mohd Sidek, Roslina

    Published 2015
    “…Development of real time motorcycle image detections on field programmable architecture is presented in this paper. …”
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  6. 6
    Automatic generation of content security policy to mitigate cross site scripting

    Automatic generation of content security policy to mitigate cross site scripting by Mhana, Samer Attallah, Din, Jamilah, Atan, Rodziah

    Published 2016
    “…It can be extended to support generating CSP for contents that are modified by JavaScript after loading. Current approach inspects the static contents of URLs.…”
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  7. 7
    Implementation of Real-time Simple Edge Detection on FPGA

    Implementation of Real-time Simple Edge Detection on FPGA by Mohd Shukor, Mohd Nasir, Lo, H. H., Sebastian , Patrick

    Published 2005
    “…The chosen image processing algorithms implemented was edge detection. This work utilizes Altera DE2 development board powered by Cyclone II FGPA pair with 1.3 Mega pixel CMOS camera from Terasic Technologies. …”
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  8. 8
    Implementation of real-time simple edge detection on FPGA

    Implementation of real-time simple edge detection on FPGA by P., Sebastian, M.N.B.M., Shukor, H.H., Lo

    Published 2007
    “…The chosen image processing algorithms implemented was edge detection. This work utilizes Altera DE2 development board powered by Cyclone II FGPA pair with 1.3 Mega pixel CMOS camera from Terasic Technologies. …”
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  9. 9
    IMAGE PROCESSING ALGORITHMS ON FPGA

    IMAGE PROCESSING ALGORITHMS ON FPGA by MOHAMED SHUKOR, MOHAMED NASIR

    Published 2007
    “…The objective of this project is to construct a real time hardware image processing system which based on Field Programmable Gate Array (FPGA). The chosen image processing algorithms are implemented on two systems which are Color Filtering System and Edge Detection System. …”
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    Final Year Project
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  10. 10
    New CFAR algorithm and circuit development for radar receiver

    New CFAR algorithm and circuit development for radar receiver by Kamal, Mustafa Subhi

    Published 2020
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  11. 11
    Adaptive persistence layer for synchronous replication (PLSR) in heterogeneous system

    Adaptive persistence layer for synchronous replication (PLSR) in heterogeneous system by Beg, Abul Hashem

    Published 2011
    “…The PLSR architecture model, workflow and algorithms are described. The PLSR has been developed using Java Programming language. …”
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  12. 12
    Design and implementation of multimedia digital matrix system

    Design and implementation of multimedia digital matrix system by Chui, Yew Leong, Ramli, Abdul Rahman, Perumal, Thinagaran, Sulaiman, Mohd Yusof, Ali, Mohd Liakot

    Published 2005
    “…Due to the issues of signal integrity in high-speed digital design, a new adaptive channel synchronization algorithm has been developed. The algorithm, named as hybrid-reset algorithm utilizes the nature of asynchronous reset to compensate the drawback of synchronous counter for phase detection. …”
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  13. 13
    Development of shape pattern recognition for fpga-based embbeded object tracking system

    Development of shape pattern recognition for fpga-based embbeded object tracking system by Fauziliana, Binti Osman

    Published 2010
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    Final Year Project Report / IMRAD
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  14. 14
    Low area Programmable Memory Built-In Self-Test (PMBIST) for small embedded ram cores / Nur Qamarina Mohd Noor

    Low area Programmable Memory Built-In Self-Test (PMBIST) for small embedded ram cores / Nur Qamarina Mohd Noor by Mohd Noor, Nur Qamarina

    Published 2013
    “…The memory BIST applies various test algorithms such as MARCH tests to detect various RAM faults. …”
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  15. 15
    Development of a steady state visual evoked potential (SSVEP)-based brain computer interface (BCI) system

    Development of a steady state visual evoked potential (SSVEP)-based brain computer interface (BCI) system by Leow, R.S., Ibrahim, F., Moghavvemi, M.

    Published 2007
    “…This paper describes the development of a synchronous, online brain computer interface (BCI) system based on detecting the steady-state visual evoked potential (SSVEP). …”
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  16. 16
    Design and analysis of high performance matrix filling for DNA sequence alignment accelerator using asic design flow: article / Nurzaima Mahmod

    Design and analysis of high performance matrix filling for DNA sequence alignment accelerator using asic design flow: article / Nurzaima Mahmod by Mahmod, Nurzaima

    “…To optimize the performance of the algorithm by exploiting parallelism in the design several techniques have been developed. …”
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  17. 17
    SIMULATION AND ANALYSIS OF HARMONIC DETECTION AND MITIGATION SYSTEM USING ACTIVE FILTER

    SIMULATION AND ANALYSIS OF HARMONIC DETECTION AND MITIGATION SYSTEM USING ACTIVE FILTER by MIZA, BELIA

    Published 2019
    “…The main objective for this study is to analyse the harmonics components in AC power system using Fast Fourier Transforms (FFT) algorithm. Other than that, the objective is also to design and develop the harmonic detection system for power quality of AC power system. …”
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    Final Year Project Report / IMRAD
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  18. 18
    MBIST implementation and evaluation in FPGA based on low-complexity March algorithms

    MBIST implementation and evaluation in FPGA based on low-complexity March algorithms by Jidin, Aiman Zakwan, Mispan, Mohd Syafiq, Hussin, Razaidi, Weng, Fook Lee

    Published 2024
    “…This paper presents the implementation and validation of MBIST controllers that applied the March AZ1 and March AZ2 algorithms in a Field-Programmable Gate Array (FPGA) device. …”
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  19. 19
    A step towards the development of VHDL model for ANN based EMG signal classifier

    A step towards the development of VHDL model for ANN based EMG signal classifier by Ahsan, Md. Rezwanul, Ibrahimy, Muhammad Ibn, Khalifa, Othman Omran

    Published 2012
    “…VHDL (Very High Speed Integrated Circuit Hardware Description Language) has been used to model the algorithm and which can be implemented into the target device FPGA (Field Programmable Gate Array). …”
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    Proceeding Paper
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  20. 20
    Preliminary study on fault detection using artificial neural network for water-cooled reactors

    Preliminary study on fault detection using artificial neural network for water-cooled reactors by Abdul Karim, Julia, Lanyau, Tony, Maskin, Masleha, Anuar, M. A. S., Che Soh, Azura, Abdul Rahman, Ribhan Zafira

    Published 2020
    “…This work was carried out to discover the use of an artificial neural network (ANN) to model and develop a fault detection programme in the RTP cooling system. …”
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