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  1. 1
    Real time motorcycle image detections on field programmable gate array

    Real time motorcycle image detections on field programmable gate array by Mat Nong, Mohd Ali, Osman, Rosiah, Md Yusof, Juraina, Mohd Sidek, Roslina

    Published 2015
    “…Development of real time motorcycle image detections on field programmable architecture is presented in this paper. …”
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  2. 2
    Input-output based relation combinatorial testing using whale optimization algorithm for generating near optimum number of test suite

    Input-output based relation combinatorial testing using whale optimization algorithm for generating near optimum number of test suite by Suali, Anjila J., Nuraminah Ramli, Rozmie Razif Othman, Hasneeza Liza Zakaria, Iszaidy Ismail, Nor Shahida Mohd Jamail, Rimuljo Hendradi, Nurol Husna Che Rose

    Published 2025
    “…This study proposes a combinatorial testing method utilizing the Whale Optimization Algorithm (WOA). The study compares the performance of WOA with various existing strategies, such as Greedy, Density, TVG, Union, ParaOrder, ReqOrder, ITTDG, AURA, Java Algorithm (CTJ), TTSGA, and AFA. …”
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  3. 3
    Implementation of Real-time Simple Edge Detection on FPGA

    Implementation of Real-time Simple Edge Detection on FPGA by Mohd Shukor, Mohd Nasir, Lo, H. H., Sebastian , Patrick

    Published 2005
    “…The chosen image processing algorithms implemented was edge detection. This work utilizes Altera DE2 development board powered by Cyclone II FGPA pair with 1.3 Mega pixel CMOS camera from Terasic Technologies. …”
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  4. 4
    A random search based effective algorithm for pairwise test data generation

    A random search based effective algorithm for pairwise test data generation by Sabira, Khatun, K. F., Rabbi, Che Yahaya, Yaakub, Klaib, Mohammad F. J.

    Published 2011
    “…This paper proposes an effective random search based pairwise test data generation algorithm named R2Way to optimize the number of test cases. …”
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  5. 5
    Implementation of real-time simple edge detection on FPGA

    Implementation of real-time simple edge detection on FPGA by P., Sebastian, M.N.B.M., Shukor, H.H., Lo

    Published 2007
    “…The chosen image processing algorithms implemented was edge detection. This work utilizes Altera DE2 development board powered by Cyclone II FGPA pair with 1.3 Mega pixel CMOS camera from Terasic Technologies. …”
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  6. 6
    EasyA: Easy and effective way to generate pairwise test data

    EasyA: Easy and effective way to generate pairwise test data by Rabbi, Khandakar Fazley, Sabira, Khatun, Che Yahaya, Yaakub, Klaib, Mohammad F. J.

    Published 2013
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  7. 7
    Implementation of locust inspired scheduling algorithm with huge number of servers for energy efficiency in a cloud datacenter

    Implementation of locust inspired scheduling algorithm with huge number of servers for energy efficiency in a cloud datacenter by Azhar, Nur Huwaina

    Published 2019
    “…Cloudsim is used as Discrete Event Simulation tool and Java as coding language to evaluate LACE algorithm. …”
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  8. 8
    IMAGE PROCESSING ALGORITHMS ON FPGA

    IMAGE PROCESSING ALGORITHMS ON FPGA by MOHAMED SHUKOR, MOHAMED NASIR

    Published 2007
    “…The objective of this project is to construct a real time hardware image processing system which based on Field Programmable Gate Array (FPGA). The chosen image processing algorithms are implemented on two systems which are Color Filtering System and Edge Detection System. …”
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    Final Year Project
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  9. 9
    An ensemble learning method for spam email detection system based on metaheuristic algorithms

    An ensemble learning method for spam email detection system based on metaheuristic algorithms by Behjat, Amir Rajabi

    Published 2015
    “…Feature subset selection and classifier ensemble learning are familiar techniques with high ability to optimize above problems. Recently, various techniques based on different algorithms have been developed. …”
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  10. 10
    New CFAR algorithm and circuit development for radar receiver

    New CFAR algorithm and circuit development for radar receiver by Kamal, Mustafa Subhi

    Published 2020
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  11. 11
    Hybrid genetic algorithm for improving fault localization

    Hybrid genetic algorithm for improving fault localization by Mahamad Zakaria, Muhammad Luqman, Sharif, Khaironi Yatim, Abd Ghani, Abdul Azim, Koh, Tieng Wei, Zulzalil, Hazura

    Published 2018
    “…Therefore, there is a need for a technique which able to localize a fault effectively with less number of mutants generated. Genetic algorithm (GA) is well known in finding an optimal solution to a problem while local search is capable of removing duplication. …”
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  12. 12
    Design and implementation of multimedia digital matrix system

    Design and implementation of multimedia digital matrix system by Chui, Yew Leong, Ramli, Abdul Rahman, Perumal, Thinagaran, Sulaiman, Mohd Yusof, Ali, Mohd Liakot

    Published 2005
    “…Due to the issues of signal integrity in high-speed digital design, a new adaptive channel synchronization algorithm has been developed. The algorithm, named as hybrid-reset algorithm utilizes the nature of asynchronous reset to compensate the drawback of synchronous counter for phase detection. …”
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  13. 13
    Development of shape pattern recognition for fpga-based embbeded object tracking system

    Development of shape pattern recognition for fpga-based embbeded object tracking system by Fauziliana, Binti Osman

    Published 2010
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    Final Year Project Report / IMRAD
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  14. 14
    Low area Programmable Memory Built-In Self-Test (PMBIST) for small embedded ram cores / Nur Qamarina Mohd Noor

    Low area Programmable Memory Built-In Self-Test (PMBIST) for small embedded ram cores / Nur Qamarina Mohd Noor by Mohd Noor, Nur Qamarina

    Published 2013
    “…The memory BIST applies various test algorithms such as MARCH tests to detect various RAM faults. …”
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  15. 15
    Development of a steady state visual evoked potential (SSVEP)-based brain computer interface (BCI) system

    Development of a steady state visual evoked potential (SSVEP)-based brain computer interface (BCI) system by Leow, R.S., Ibrahim, F., Moghavvemi, M.

    Published 2007
    “…This paper describes the development of a synchronous, online brain computer interface (BCI) system based on detecting the steady-state visual evoked potential (SSVEP). …”
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  16. 16
    Design and analysis of high performance matrix filling for DNA sequence alignment accelerator using asic design flow: article / Nurzaima Mahmod

    Design and analysis of high performance matrix filling for DNA sequence alignment accelerator using asic design flow: article / Nurzaima Mahmod by Mahmod, Nurzaima

    “…To optimize the performance of the algorithm by exploiting parallelism in the design several techniques have been developed. …”
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  17. 17
    SIMULATION AND ANALYSIS OF HARMONIC DETECTION AND MITIGATION SYSTEM USING ACTIVE FILTER

    SIMULATION AND ANALYSIS OF HARMONIC DETECTION AND MITIGATION SYSTEM USING ACTIVE FILTER by MIZA, BELIA

    Published 2019
    “…The main objective for this study is to analyse the harmonics components in AC power system using Fast Fourier Transforms (FFT) algorithm. Other than that, the objective is also to design and develop the harmonic detection system for power quality of AC power system. …”
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    Final Year Project Report / IMRAD
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  18. 18
    MBIST implementation and evaluation in FPGA based on low-complexity March algorithms

    MBIST implementation and evaluation in FPGA based on low-complexity March algorithms by Jidin, Aiman Zakwan, Mispan, Mohd Syafiq, Hussin, Razaidi, Weng, Fook Lee

    Published 2024
    “…This paper presents the implementation and validation of MBIST controllers that applied the March AZ1 and March AZ2 algorithms in a Field-Programmable Gate Array (FPGA) device. …”
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  19. 19
    An enhancement of multi-factor weighted approach technique in prioritizing test cases by comparing similarity distance

    An enhancement of multi-factor weighted approach technique in prioritizing test cases by comparing similarity distance by Al-Shaibani, Alaa Alrhman Mohammed Raweh, Ahmad, Johanna, Hassan, Rohayanti, Baharom, Salmi, Antari, Dwinta Suci

    Published 2025
    “…Our aim of this research is to compare and evaluate both Jaccard and Manhattan Distance algorithms in terms of their effectiveness to formulate the enhancement of the previous multi-factor weighted Approach. …”
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  20. 20
    A step towards the development of VHDL model for ANN based EMG signal classifier

    A step towards the development of VHDL model for ANN based EMG signal classifier by Ahsan, Md. Rezwanul, Ibrahimy, Muhammad Ibn, Khalifa, Othman Omran

    Published 2012
    “…VHDL (Very High Speed Integrated Circuit Hardware Description Language) has been used to model the algorithm and which can be implemented into the target device FPGA (Field Programmable Gate Array). …”
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