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  1. 1
    Booth’s Algorithm Design Using Field Programmable Gate Array

    Booth’s Algorithm Design Using Field Programmable Gate Array by Ab Hadi, Nik Azran, A Aziz, Khairul Azha, Hashim, Nik Mohd Zarifie, Omar, Muhammad Shukri, Jaafar, Anuar

    Published 2014
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  2. 2
    Developed method of FPGA-based fuzzy logic controller design with the aid of conventional PID algorithm

    Developed method of FPGA-based fuzzy logic controller design with the aid of conventional PID algorithm by Obaid, Zeyad Assi, Sulaiman, Nasri, Hamidon, Mohd Nizar

    Published 2009
    “…This paper proposes developed method to design a digital fuzzy logic controller with the aid of conventional Proportional – integral – derivative (PID) controller using field programmable gate array (FPGA). …”
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  3. 3
    DC motor control using LQR algorithm

    DC motor control using LQR algorithm by Adezeno, Sagoli Olid

    Published 2008
    “…In this research, the predictive algorithm namely Linear Quadratic Regulator (LQR) will be design along with the industries certified DC motor in order to monitor the peak performance of the system and the stability of the design after interfacing with Programmable Logic Controller (PLC). …”
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    Undergraduates Project Papers
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  4. 4
    Intelligent muslim prayer counter with programmable interface controller (PIC)

    Intelligent muslim prayer counter with programmable interface controller (PIC) by Hassim, Hasniza

    Published 2014
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  5. 5
    Design of an advanced encryption standard crypto-processor core for field programmable gate array implementation

    Design of an advanced encryption standard crypto-processor core for field programmable gate array implementation by Ismail, Mohd. Izuan

    Published 2006
    “…The proposed AES Crypto-Processor accelerates the AES algorithm in reconfigurable Field Programmable Gate Arrays (FPGA). …”
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  6. 6
    RISC-V instruction set extension on blockchain application

    RISC-V instruction set extension on blockchain application by Cheong , Kin Seng

    Published 2024
    “…This would greatly shorten the instructions used by the algorithms and improved the execution time of the programmes. …”
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    Final Year Project / Dissertation / Thesis
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  7. 7
    Design and implementation of multimedia digital matrix system

    Design and implementation of multimedia digital matrix system by Chui, Yew Leong, Ramli, Abdul Rahman, Perumal, Thinagaran, Sulaiman, Mohd Yusof, Ali, Mohd Liakot

    Published 2005
    “…Due to the issues of signal integrity in high-speed digital design, a new adaptive channel synchronization algorithm has been developed. …”
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  8. 8
    Design and development of a programmable painting robot for houses and buildings

    Design and development of a programmable painting robot for houses and buildings by Aris, I., Parvez Iqbal, A. K. M., Ramli, A. R., Shamsuddin, S.

    “…To Overcome This Difficulty, A Programmable Painter Robotic System Is Proposed, Designed And Developed. …”
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  9. 9
    Design and development of a programmable painting robot for houses and buildings

    Design and development of a programmable painting robot for houses and buildings by Aris, A. K. M., Iqbal, Parvez, Ramli, A. R., Shamsuddin, S

    Published 2005
    “…To overcome this difficulty, a programmable painter robotic system is proposed, designed and developed. …”
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  10. 10
    Neuro-Fuzzy Algorithm Implemented In Altera’s FPGA For Mobile Robot’s Obstacle Avoidance Mission.

    Neuro-Fuzzy Algorithm Implemented In Altera’s FPGA For Mobile Robot’s Obstacle Avoidance Mission. by Mahyuddin, Muhammad Nasiruddin, Chan, Zhi Wei, Arshad, Mohd Rizal

    Published 2009
    “…This paper presents the designed obstacle avoidance program for mobile robot that incorporates a neuro-fuzzy algorithm using Altera™ Field Programmable Gate Array (FPGA) development DE2 board. …”
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  11. 11
    Agent-based extraction algorithm for computational problem solving

    Agent-based extraction algorithm for computational problem solving by Rajabi, Maryam

    Published 2015
    “…The proposed agent-based model for CPS has been designed using Prometheus Design Tools (PDT), which can be plugged-in with Eclipse Environment. …”
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  12. 12
    Development of low power viterbi decoder on complex programmable logic device platform

    Development of low power viterbi decoder on complex programmable logic device platform by Abu, Mohd Azlan

    Published 2018
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  13. 13
    Implementation of PRINCE algorithm in FPGA

    Implementation of PRINCE algorithm in FPGA by Abbas Y.A., Jidin R., Jamil N., Z'aba M.R., Rusli M.E., Tariq B.

    Published 2023
    Conference Paper
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  14. 14
    Real time motorcycle image detections on field programmable gate array

    Real time motorcycle image detections on field programmable gate array by Mat Nong, Mohd Ali, Osman, Rosiah, Md Yusof, Juraina, Mohd Sidek, Roslina

    Published 2015
    “…This paper also discussed on image processing algorithm used and embedded techniques involved. The performance evaluation results also indicated and shows that development design meet the requirement.…”
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  15. 15
    Design and analysis of high performance matrix filling for DNA sequence alignment accelerator using asic design flow: article / Nurzaima Mahmod

    Design and analysis of high performance matrix filling for DNA sequence alignment accelerator using asic design flow: article / Nurzaima Mahmod by Mahmod, Nurzaima

    “…To optimize the performance of the algorithm by exploiting parallelism in the design several techniques have been developed. …”
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  16. 16
    Design of a reconfigurable computing platform

    Design of a reconfigurable computing platform by Papu J.J., See O.H.

    Published 2023
    “…The RCP utilizes Impulse CoDeveloper which is an electronic system level (ESL) design tool that compiles sequential applications/algorithms in C to synthesizable HDL. …”
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  17. 17
    Graph processing hardware accelerator for shortest path algorithms in nanometer very large-scale integration interconnect routing

    Graph processing hardware accelerator for shortest path algorithms in nanometer very large-scale integration interconnect routing by Ch'ng, Heng Sun

    Published 2007
    “…A custom Graph Processing Unit (GPU), in which a hardware priority queue accelerator is embedded, designed and prototyped in a Field Programmable Gate Array (FPGA) based hardware platform. …”
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  18. 18
    Computerised Heuristic Algorithm for Multi-location Lecture Timetabling

    Computerised Heuristic Algorithm for Multi-location Lecture Timetabling by Kuan, Huiggy

    Published 2020
    “…A two-stage heuristic algorithm is proposed to solve the multi-location timetabling problem on MSc HRD coursework programme. …”
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  19. 19
    Design and analysis of high performance matrix filling for DNA sequence alignment accelerator using ASIC design flow / Nurzaima Mahmod

    Design and analysis of high performance matrix filling for DNA sequence alignment accelerator using ASIC design flow / Nurzaima Mahmod by Mahmod, Nurzaima

    Published 2010
    “…To optimize the performance of the algorithm by exploiting parallelism in the design several techniques have been developed. …”
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  20. 20
    Design high frequency surgical robot controller: design FPGA-based controller for surgical robot manipulator simscape modeling

    Design high frequency surgical robot controller: design FPGA-based controller for surgical robot manipulator simscape modeling by Taghizadegan, Ali, Piltan, Farzin, Sulaiman, Nasri B.

    Published 2016
    “…To design PID type FPGA-based controller two types algorithm are needed: derivative algorithm and integral algorithm. …”
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