Search Results - (( development programme computing algorithm ) OR ( java application optimisation algorithm ))

Study and Implementation of Data Mining in Urban Gardening by Mohana, Muniandy, Lee, Eu Vern

“…The system is essentially a three-part development, utilising Android, Java Servlets, and Arduino platforms to create an optimised and automated urban-gardening system. …”
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RISC-V instruction set extension on blockchain application by Cheong , Kin Seng

“…This would greatly shorten the instructions used by the algorithms and improved the execution time of the programmes. …”
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Agent-based extraction algorithm for computational problem solving by Rajabi, Maryam

“…How far the proposed agent-based model for CPS is able to help novice programmer is evaluated by conducting a group based experiment with 35 students from Faculty of Computer Science and Information Technology (FSKTM). …”
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Parallel computation of maass cusp forms using mathematica by Chan, Kar Tim

“…Our parallel programme comprises of two important parts namely the pullback algorithm and also the Maass cusp form algorithm. …”
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Prediction of MUET result based on KNN algorithm / Siti Fatimah Azzahra Hamrizan by Hamrizan, Siti Fatimah Azzahra

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Web-based expert system for material selection of natural fiber- reinforced polymer composites by Ahmed Ali, Basheer Ahmed

“…Finally, the developed expert system was deployed over the internet with central interactive interface from the server as a web-based application. As Java is platform independent and easy to be deployed in web based application and accessible through the World Wide Web (www), this expert system can be one stop application for materials selection.…”
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Design of a reconfigurable computing platform by Papu J.J., See O.H.

“…The RCP utilizes Impulse CoDeveloper which is an electronic system level (ESL) design tool that compiles sequential applications/algorithms in C to synthesizable HDL. …”

Computerised Heuristic Algorithm for Multi-location Lecture Timetabling by Kuan, Huiggy

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Implementation of PRINCE algorithm in FPGA by Abbas Y.A., Jidin R., Jamil N., Z'aba M.R., Rusli M.E., Tariq B.

Hardware Design Of Random Number Generator And Random Walk-Onboundary Algorithm To Compute Unit Cube Capacitance In Fpga by Niun, Cheah How

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Development of low power viterbi decoder on complex programmable logic device platform by Abu, Mohd Azlan

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Graph processing hardware accelerator for shortest path algorithms in nanometer very large-scale integration interconnect routing by Ch'ng, Heng Sun

“…For design validation and performance test purposes, a computationally expensive VLSI interconnect routing Computer Aided Design (CAD) module is developed. …”
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Design of an advanced encryption standard crypto-processor core for field programmable gate array implementation by Ismail, Mohd. Izuan

“…The proposed AES Crypto-Processor accelerates the AES algorithm in reconfigurable Field Programmable Gate Arrays (FPGA). …”
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Flowshop scheduling using artificial bee colony (ABC) algorithm with varying onlooker bees approaches by Mohd Pauzi, Nur Fazlinda

“…The main objective of this research is to develop a computer program with capability of manipulating the onlooker bee approaches in ABC Algorithm for solving flowshop scheduling problem. …”
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Instruction Set Extension Of A Low-End Reconfigurable Microcontroller In Bit-Sorting Implementation by Salim, Sani Irwan, Soo, Yew Guan, Samsudin, Sharatul Izah

“…The modules’ integration is implemented using instruction set architecture (ISA) extension technique and is developed on the Field Programmable Gate Array (FPGA). …”
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Adaptive background reconstruction for street surveillance by Zainuddin, N. Afiqah, Mohd Mustafah, Yasir, Shafie, Amir Akramin, Rashidan, M. Ariff

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Application Specific Instruction Set Processor (ASIP) Design In An 8-Bit Softcore Microcontroller by Salim, Sani Irwan, Soo, Yew Guan, Samsudin, Sharatul Izah

“…The modules’ integration is implemented using ASIP design without occurring extra board space and is developed using the Field Programmable Gate Array (FPGA) as the single chip solutions. …”
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Examination timetabling for undergraduate programme using graph coloring approach / Norarida Abd Rhani ... [et al.] by Abd Rhani, Norarida, Mat Saad, Nor Najihah, Zulkfeli, Nabilah, Mazlan, Mardhiyah Marisha, Mahmud, Maziah, Mohamad, Siti Nurul Fitriah, Wan Yusoff, Wan Roslini

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Implementation of High Speed Large Integer Multiplication Algorithm on Contemporary Architecture by Chang, Boon Chiao

“…The computation of cryptographic algorithm required a lot of large integer arithmetic computation, especially large integer exponentiation and modular operation. …”
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A customized floating-point processor design for FPGA and ASIC based thermal compensation in high-precision sensing by Sajjad, M., Yusoff, M.Z., Ahmed, M.

“…In this work we have proposed a digital architecture for a programmable high precision computational unit which can be implemented in the FPGA or ASIC running the sensing algorithm of the sensors. …”
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