Search Results - (( development programme computing algorithm ) OR ( java application modified algorithm ))

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  1. 1
    Challenges of hidden data in the unused area two within executable files

    Challenges of hidden data in the unused area two within executable files by Naji, Ahmed Wathik, Zaidan, A.A., Zaidan, B.B.

    Published 2009
    “…Results: The programs were coded in Java computer language and implemented on Pentium PC. The designed algorithms were intended to help in proposed system aim to hide and retract information (data file) with in unused area 2 of any execution file(exe.file). …”
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  2. 2
    Direct approach for mining association rules from structured XML data

    Direct approach for mining association rules from structured XML data by Abazeed, Ashraf Riad

    Published 2012
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    Thesis
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  3. 3
    RISC-V instruction set extension on blockchain application

    RISC-V instruction set extension on blockchain application by Cheong , Kin Seng

    Published 2024
    “…This would greatly shorten the instructions used by the algorithms and improved the execution time of the programmes. …”
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    Final Year Project / Dissertation / Thesis
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  4. 4
    Agent-based extraction algorithm for computational problem solving

    Agent-based extraction algorithm for computational problem solving by Rajabi, Maryam

    Published 2015
    “…How far the proposed agent-based model for CPS is able to help novice programmer is evaluated by conducting a group based experiment with 35 students from Faculty of Computer Science and Information Technology (FSKTM). …”
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  5. 5
    Parallel computation of maass cusp forms using mathematica

    Parallel computation of maass cusp forms using mathematica by Chan, Kar Tim

    Published 2013
    “…Our parallel programme comprises of two important parts namely the pullback algorithm and also the Maass cusp form algorithm. …”
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  6. 6
    Prediction of MUET result based on KNN algorithm / Siti Fatimah Azzahra Hamrizan

    Prediction of MUET result based on KNN algorithm / Siti Fatimah Azzahra Hamrizan by Hamrizan, Siti Fatimah Azzahra

    Published 2021
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  7. 7
    Design of a reconfigurable computing platform

    Design of a reconfigurable computing platform by Papu J.J., See O.H.

    Published 2023
    “…The RCP utilizes Impulse CoDeveloper which is an electronic system level (ESL) design tool that compiles sequential applications/algorithms in C to synthesizable HDL. …”
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  8. 8
    Prevention And Detection Mechanism For Security In Passive Rfid System

    Prevention And Detection Mechanism For Security In Passive Rfid System by Khor, Jing Huey

    Published 2013
    “…A GUI is created in a form of JAVA application to display data detected from tag. …”
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  9. 9
    Automatic generation of content security policy to mitigate cross site scripting

    Automatic generation of content security policy to mitigate cross site scripting by Mhana, Samer Attallah, Din, Jamilah, Atan, Rodziah

    Published 2016
    “…The algorithm is implemented as a plugin. It does not interfere with the web application original code. …”
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    Conference or Workshop Item
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  10. 10
    Computerised Heuristic Algorithm for Multi-location Lecture Timetabling

    Computerised Heuristic Algorithm for Multi-location Lecture Timetabling by Kuan, Huiggy

    Published 2020
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  11. 11
    Implementation of PRINCE algorithm in FPGA

    Implementation of PRINCE algorithm in FPGA by Abbas Y.A., Jidin R., Jamil N., Z'aba M.R., Rusli M.E., Tariq B.

    Published 2023
    Conference Paper
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  12. 12
    Hardware Design Of Random Number Generator And Random Walk-Onboundary Algorithm To Compute Unit Cube Capacitance In Fpga

    Hardware Design Of Random Number Generator And Random Walk-Onboundary Algorithm To Compute Unit Cube Capacitance In Fpga by Niun, Cheah How

    Published 2016
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  13. 13
    Development of low power viterbi decoder on complex programmable logic device platform

    Development of low power viterbi decoder on complex programmable logic device platform by Abu, Mohd Azlan

    Published 2018
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  14. 14
    Graph processing hardware accelerator for shortest path algorithms in nanometer very large-scale integration interconnect routing

    Graph processing hardware accelerator for shortest path algorithms in nanometer very large-scale integration interconnect routing by Ch'ng, Heng Sun

    Published 2007
    “…For design validation and performance test purposes, a computationally expensive VLSI interconnect routing Computer Aided Design (CAD) module is developed. …”
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  15. 15
    Design of an advanced encryption standard crypto-processor core for field programmable gate array implementation

    Design of an advanced encryption standard crypto-processor core for field programmable gate array implementation by Ismail, Mohd. Izuan

    Published 2006
    “…The proposed AES Crypto-Processor accelerates the AES algorithm in reconfigurable Field Programmable Gate Arrays (FPGA). …”
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  16. 16
    Flowshop scheduling using artificial bee colony (ABC) algorithm with varying onlooker bees approaches

    Flowshop scheduling using artificial bee colony (ABC) algorithm with varying onlooker bees approaches by Mohd Pauzi, Nur Fazlinda

    Published 2015
    “…The main objective of this research is to develop a computer program with capability of manipulating the onlooker bee approaches in ABC Algorithm for solving flowshop scheduling problem. …”
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  17. 17
    Instruction Set Extension Of A Low-End Reconfigurable Microcontroller In Bit-Sorting Implementation

    Instruction Set Extension Of A Low-End Reconfigurable Microcontroller In Bit-Sorting Implementation by Salim, Sani Irwan, Soo, Yew Guan, Samsudin, Sharatul Izah

    Published 2018
    “…The modules’ integration is implemented using instruction set architecture (ISA) extension technique and is developed on the Field Programmable Gate Array (FPGA). …”
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  18. 18
    Adaptive background reconstruction for street surveillance

    Adaptive background reconstruction for street surveillance by Zainuddin, N. Afiqah, Mohd Mustafah, Yasir, Shafie, Amir Akramin, Rashidan, M. Ariff

    Published 2014
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    Proceeding Paper
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  19. 19
    Application Specific Instruction Set Processor (ASIP) Design In An 8-Bit Softcore Microcontroller

    Application Specific Instruction Set Processor (ASIP) Design In An 8-Bit Softcore Microcontroller by Salim, Sani Irwan, Soo, Yew Guan, Samsudin, Sharatul Izah

    Published 2018
    “…The modules’ integration is implemented using ASIP design without occurring extra board space and is developed using the Field Programmable Gate Array (FPGA) as the single chip solutions. …”
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  20. 20
    Examination timetabling for undergraduate programme using graph coloring approach / Norarida Abd Rhani ... [et al.]

    Examination timetabling for undergraduate programme using graph coloring approach / Norarida Abd Rhani ... [et al.] by Abd Rhani, Norarida, Mat Saad, Nor Najihah, Zulkfeli, Nabilah, Mazlan, Mardhiyah Marisha, Mahmud, Maziah, Mohamad, Siti Nurul Fitriah, Wan Yusoff, Wan Roslini

    Published 2021
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