Search Results - (( development programme computer algorithm ) OR ( java implication based algorithm ))

Search alternatives:

Refine Results
  1. 1
    RISC-V instruction set extension on blockchain application

    RISC-V instruction set extension on blockchain application by Cheong , Kin Seng

    Published 2024
    “…This would greatly shorten the instructions used by the algorithms and improved the execution time of the programmes. …”
    Get full text
    Get full text
    Final Year Project / Dissertation / Thesis
    Save to List
    Saved in:
  2. 2
    Agent-based extraction algorithm for computational problem solving

    Agent-based extraction algorithm for computational problem solving by Rajabi, Maryam

    Published 2015
    “…How far the proposed agent-based model for CPS is able to help novice programmer is evaluated by conducting a group based experiment with 35 students from Faculty of Computer Science and Information Technology (FSKTM). …”
    Get full text
    Get full text
    Thesis
    Save to List
    Saved in:
  3. 3
    Parallel computation of maass cusp forms using mathematica

    Parallel computation of maass cusp forms using mathematica by Chan, Kar Tim

    Published 2013
    “…Our parallel programme comprises of two important parts namely the pullback algorithm and also the Maass cusp form algorithm. …”
    Get full text
    Get full text
    Thesis
    Save to List
    Saved in:
  4. 4
    Prediction of MUET result based on KNN algorithm / Siti Fatimah Azzahra Hamrizan

    Prediction of MUET result based on KNN algorithm / Siti Fatimah Azzahra Hamrizan by Hamrizan, Siti Fatimah Azzahra

    Published 2021
    Get full text
    Get full text
    Thesis
    Save to List
    Saved in:
  5. 5
    Design of a reconfigurable computing platform

    Design of a reconfigurable computing platform by Papu J.J., See O.H.

    Published 2023
    “…The RCP utilizes Impulse CoDeveloper which is an electronic system level (ESL) design tool that compiles sequential applications/algorithms in C to synthesizable HDL. …”
    Conference paper
    Save to List
    Saved in:
  6. 6
    The implications for ahybrid detection technique against malicious sqlattacks on web applications

    The implications for ahybrid detection technique against malicious sqlattacks on web applications by Bahjat Arif, Sarajaldeen Akram, Wani, Sharyar

    Published 2025
    Get full text
    Get full text
    Get full text
    Article
    Save to List
    Saved in:
  7. 7
    Computerised Heuristic Algorithm for Multi-location Lecture Timetabling

    Computerised Heuristic Algorithm for Multi-location Lecture Timetabling by Kuan, Huiggy

    Published 2020
    Get full text
    Get full text
    Get full text
    Thesis
    Save to List
    Saved in:
  8. 8
    Implementation of PRINCE algorithm in FPGA

    Implementation of PRINCE algorithm in FPGA by Abbas Y.A., Jidin R., Jamil N., Z'aba M.R., Rusli M.E., Tariq B.

    Published 2023
    Conference Paper
    Save to List
    Saved in:
  9. 9
    Hardware Design Of Random Number Generator And Random Walk-Onboundary Algorithm To Compute Unit Cube Capacitance In Fpga

    Hardware Design Of Random Number Generator And Random Walk-Onboundary Algorithm To Compute Unit Cube Capacitance In Fpga by Niun, Cheah How

    Published 2016
    Get full text
    Get full text
    Thesis
    Save to List
    Saved in:
  10. 10
    Development of low power viterbi decoder on complex programmable logic device platform

    Development of low power viterbi decoder on complex programmable logic device platform by Abu, Mohd Azlan

    Published 2018
    Get full text
    Get full text
    Get full text
    Thesis
    Save to List
    Saved in:
  11. 11
    Graph processing hardware accelerator for shortest path algorithms in nanometer very large-scale integration interconnect routing

    Graph processing hardware accelerator for shortest path algorithms in nanometer very large-scale integration interconnect routing by Ch'ng, Heng Sun

    Published 2007
    “…For design validation and performance test purposes, a computationally expensive VLSI interconnect routing Computer Aided Design (CAD) module is developed. …”
    Get full text
    Get full text
    Get full text
    Thesis
    Save to List
    Saved in:
  12. 12
    Design of an advanced encryption standard crypto-processor core for field programmable gate array implementation

    Design of an advanced encryption standard crypto-processor core for field programmable gate array implementation by Ismail, Mohd. Izuan

    Published 2006
    “…The proposed AES Crypto-Processor accelerates the AES algorithm in reconfigurable Field Programmable Gate Arrays (FPGA). …”
    Get full text
    Get full text
    Thesis
    Save to List
    Saved in:
  13. 13
    Flowshop scheduling using artificial bee colony (ABC) algorithm with varying onlooker bees approaches

    Flowshop scheduling using artificial bee colony (ABC) algorithm with varying onlooker bees approaches by Mohd Pauzi, Nur Fazlinda

    Published 2015
    “…The main objective of this research is to develop a computer program with capability of manipulating the onlooker bee approaches in ABC Algorithm for solving flowshop scheduling problem. …”
    Get full text
    Get full text
    Get full text
    Get full text
    Thesis
    Save to List
    Saved in:
  14. 14
    Instruction Set Extension Of A Low-End Reconfigurable Microcontroller In Bit-Sorting Implementation

    Instruction Set Extension Of A Low-End Reconfigurable Microcontroller In Bit-Sorting Implementation by Salim, Sani Irwan, Soo, Yew Guan, Samsudin, Sharatul Izah

    Published 2018
    “…The modules’ integration is implemented using instruction set architecture (ISA) extension technique and is developed on the Field Programmable Gate Array (FPGA). …”
    Get full text
    Get full text
    Get full text
    Article
    Save to List
    Saved in:
  15. 15
    Adaptive background reconstruction for street surveillance

    Adaptive background reconstruction for street surveillance by Zainuddin, N. Afiqah, Mohd Mustafah, Yasir, Shafie, Amir Akramin, Rashidan, M. Ariff

    Published 2014
    Get full text
    Get full text
    Get full text
    Get full text
    Proceeding Paper
    Save to List
    Saved in:
  16. 16
    Application Specific Instruction Set Processor (ASIP) Design In An 8-Bit Softcore Microcontroller

    Application Specific Instruction Set Processor (ASIP) Design In An 8-Bit Softcore Microcontroller by Salim, Sani Irwan, Soo, Yew Guan, Samsudin, Sharatul Izah

    Published 2018
    “…The modules’ integration is implemented using ASIP design without occurring extra board space and is developed using the Field Programmable Gate Array (FPGA) as the single chip solutions. …”
    Get full text
    Get full text
    Get full text
    Article
    Save to List
    Saved in:
  17. 17
    Examination timetabling for undergraduate programme using graph coloring approach / Norarida Abd Rhani ... [et al.]

    Examination timetabling for undergraduate programme using graph coloring approach / Norarida Abd Rhani ... [et al.] by Abd Rhani, Norarida, Mat Saad, Nor Najihah, Zulkfeli, Nabilah, Mazlan, Mardhiyah Marisha, Mahmud, Maziah, Mohamad, Siti Nurul Fitriah, Wan Yusoff, Wan Roslini

    Published 2021
    Get full text
    Get full text
    Get full text
    Article
    Save to List
    Saved in:
  18. 18
    Implementation of High Speed Large Integer Multiplication Algorithm on Contemporary Architecture

    Implementation of High Speed Large Integer Multiplication Algorithm on Contemporary Architecture by Chang, Boon Chiao

    Published 2018
    “…The computation of cryptographic algorithm required a lot of large integer arithmetic computation, especially large integer exponentiation and modular operation. …”
    Get full text
    Get full text
    Final Year Project / Dissertation / Thesis
    Save to List
    Saved in:
  19. 19
    A customized floating-point processor design for FPGA and ASIC based thermal compensation in high-precision sensing

    A customized floating-point processor design for FPGA and ASIC based thermal compensation in high-precision sensing by Sajjad, M., Yusoff, M.Z., Ahmed, M.

    Published 2021
    “…In this work we have proposed a digital architecture for a programmable high precision computational unit which can be implemented in the FPGA or ASIC running the sensing algorithm of the sensors. …”
    Get full text
    Get full text
    Article
    Save to List
    Saved in:
  20. 20
    A Machine Learning Classification Application to Identify Inefficient Novice Programmers

    A Machine Learning Classification Application to Identify Inefficient Novice Programmers by Khan I., Al-Mamari A., Al-Abdulsalam B., Al-Abdulsalam F., Al-Khansuri M., Iqbal Malik S., Ahmad A.R.

    Published 2023
    Conference Paper
    Save to List
    Saved in:

Search Tools: