Search Results - (( development programme boost algorithm ) OR ( java visualization learning algorithm ))

Development Of Machine Learning User Interface For Pump Diagnostics by Lee, Zhao Yang

“…Build up a user interface by using Visual Studio Code (VSC) to run the coding of Cascading Style Sheet (CSS), Hyper Text Markup Language (HTML) and JavaScript (JS) as a webpage and connect to Azure Machine Learning Model and this will allow the user from using the model from a webpage when they have active internet with any devices.…”
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Mathematical simulation for 3-dimensional temperature visualization on open source-based grid computing platform by Alias, Norma, Satam, Noriza, Abd. Ghaffar, Zarith Safiza, Darwis, Roziha, Hamzah, Norhafiza, Islam, Md. Rajibul

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Beyond Grades - Predicting Programme Learning Outcomes with Multi-Output Regression in Malaysian Higher Education by Muhammad Noorazizi Abd Ghani, Istas Fahrurrazi Nusyirwan

Collaborative-based web recommender system for community-driven homestay programmes by Miraz, Mahadi Hasan

“…All these operations are carried out simultaneously to boost the functions of the CBWR system. Hence, this research contributes to the development of a specific unique web database and a CBWR system, which is adopted from collaborative algorithm. …”
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Mobile application for real time baby sign language recognition using YOLOv8 / Siti Aishah Idris and Ahmad Firdaus Ahmad Fadzil by Idris, Siti Aishah, Ahmad Fadzil, Ahmad Firdaus

“…The model will be designed and developed using a deep learning algorithm, which is YOLOv8, the latest version of YOLO. …”
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Instruction Set Extension Of A Low-End Reconfigurable Microcontroller In Bit-Sorting Implementation by Salim, Sani Irwan, Soo, Yew Guan, Samsudin, Sharatul Izah

“…The modules’ integration is implemented using instruction set architecture (ISA) extension technique and is developed on the Field Programmable Gate Array (FPGA). …”
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Application Specific Instruction Set Processor (ASIP) Design In An 8-Bit Softcore Microcontroller by Salim, Sani Irwan, Soo, Yew Guan, Samsudin, Sharatul Izah

“…The modules’ integration is implemented using ASIP design without occurring extra board space and is developed using the Field Programmable Gate Array (FPGA) as the single chip solutions. …”
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