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  1. 1
    Design and implementation of multimedia digital matrix system

    Design and implementation of multimedia digital matrix system by Chui, Yew Leong, Ramli, Abdul Rahman, Perumal, Thinagaran, Sulaiman, Mohd Yusof, Ali, Mohd Liakot

    Published 2005
    “…Due to the issues of signal integrity in high-speed digital design, a new adaptive channel synchronization algorithm has been developed. The algorithm, named as hybrid-reset algorithm utilizes the nature of asynchronous reset to compensate the drawback of synchronous counter for phase detection. …”
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  2. 2
    Development of low power viterbi decoder on complex programmable logic device platform

    Development of low power viterbi decoder on complex programmable logic device platform by Abu, Mohd Azlan

    Published 2018
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  3. 3
    Lightweight PRINCE algorithm IP core for securing GSM messaging using FPGA

    Lightweight PRINCE algorithm IP core for securing GSM messaging using FPGA by Abbas Y.A., Jidin R., Jamil N., Z'aba M.R.

    Published 2023
    “…Meanwhile, the rapid development of global system for mobile communication (GSM) systems makes communicating parties more vulnerable than ever to security attacks. …”
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  4. 4
    The implications for ahybrid detection technique against malicious sqlattacks on web applications

    The implications for ahybrid detection technique against malicious sqlattacks on web applications by Bahjat Arif, Sarajaldeen Akram, Wani, Sharyar

    Published 2025
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  5. 5
    Design of an advanced encryption standard crypto-processor core for field programmable gate array implementation

    Design of an advanced encryption standard crypto-processor core for field programmable gate array implementation by Ismail, Mohd. Izuan

    Published 2006
    “…The proposed AES Crypto-Processor accelerates the AES algorithm in reconfigurable Field Programmable Gate Arrays (FPGA). …”
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  6. 6
    Adaptive background reconstruction for street surveillance

    Adaptive background reconstruction for street surveillance by Zainuddin, N. Afiqah, Mohd Mustafah, Yasir, Shafie, Amir Akramin, Rashidan, M. Ariff

    Published 2014
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  7. 7
    Hardware Implementation Of Rc4a Stream Cipher Algorithm

    Hardware Implementation Of Rc4a Stream Cipher Algorithm by Al Noman, Abdullah

    Published 2007
    “…Under the existing circumstances cryptography is the only convenient method for protecting information transmitted through communication networks. The hardware implementation of cryptographic algorithms plays an important role because of growing requirements of high speed and high level secure communications. …”
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  8. 8
    Development of LabVIEW FPGA program for Energy Management System (EMS) Controller for Hybrid Electric Vehicle (HEV)

    Development of LabVIEW FPGA program for Energy Management System (EMS) Controller for Hybrid Electric Vehicle (HEV) by Mustaffa Kamal Basha, Abdul Aziz

    Published 2016
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  9. 9
    Crypto Embedded System for Electronic Document

    Crypto Embedded System for Electronic Document by Ahmad, Illiasaak, M.Thamrin, Norashikin, Hani, Mohamed Khalil

    Published 2006
    “…The RSA algorithm is implemented in a re-configurable hardware, in this case Field Programmable Gate Array (FPGA). …”
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  10. 10
    Digital Quran With Storage Optimization Through Duplication Handling And Compressed Sparse Matrix Method

    Digital Quran With Storage Optimization Through Duplication Handling And Compressed Sparse Matrix Method by Ashraf Saleh Mohammad Alomoush

    Published 2024
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  11. 11
    FPGA implementation of multiplier for floating-point numbers based on IEEE 754-2008 standard

    FPGA implementation of multiplier for floating-point numbers based on IEEE 754-2008 standard by Shyamsi, M., Ibrahimy, Muhammad Ibn, Motakabber, S. M. A., Ahsan, M. R.

    Published 2015
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  12. 12
    A Malay Chatterbot

    A Malay Chatterbot by Lokman, Aina Fatiha

    Published 2005
    “…In this paper, the author presents an approach to develop a chatterbot, A Malay-Intelligence Response Application (A.M.I.R.A) that will be able to communicate or converse in Bahasa Melayu. …”
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  13. 13
    Towards Maximising Hardware Resources and Design Efficiency via High-Speed Implementation of HMAC based on SHA-256 Design

    Towards Maximising Hardware Resources and Design Efficiency via High-Speed Implementation of HMAC based on SHA-256 Design by Shamsiah, Suhaili, Norhuzaimin, Julai, Rohana, Sapawi, Nordiana, Rajaee

    Published 2024
    “…It was successfully developed using Verilog Hardware Description Language (HDL) code with the implementation of a Field Programmable Gate Array (FPGA) device using the Altera Quartus II Computer-Aided Design (CAD) tool to enhance the maximum frequency of the design. …”
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  14. 14
    Towards Maximising Hardware Resources and Design Efficiency via High-Speed Implementation of HMAC based on SHA-256 Design

    Towards Maximising Hardware Resources and Design Efficiency via High-Speed Implementation of HMAC based on SHA-256 Design by Shamsiah, Suhaili, Norhuzaimin, Julai, Rohana, Sapawi, Nordiana, Rajaee

    Published 2024
    “…It was successfully developed using Verilog Hardware Description Language (HDL) code with the implementation of a Field Programmable Gate Array (FPGA) device using the Altera Quartus II Computer-Aided Design (CAD) tool to enhance the maximum frequency of the design. …”
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  15. 15
    Runtime pluggable CPU scheduler for linux operating system

    Runtime pluggable CPU scheduler for linux operating system by Al-Maweri, Nasr Addin Ahmed Salem

    Published 2010
    “…It also provides a flexible interface for kernel developers which facilitates the evaluation and testing for their newly developed scheduling algorithms. …”
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  16. 16
    Controller placement problem in the optimization of 5G based SDN and NFV architecture

    Controller placement problem in the optimization of 5G based SDN and NFV architecture by Ibrahim, Abeer Abdalla Zakaria

    Published 2021
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  17. 17
    A review on path collisions and resources usage in hybrid optical Network on Chip (HONoC)

    A review on path collisions and resources usage in hybrid optical Network on Chip (HONoC) by Razali R.A., Othman M.

    Published 2023
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  18. 18
    Vision aided path planning for mobile robot

    Vision aided path planning for mobile robot by Rashidan, M. Ariff, Mohd Mustafah, Yasir, Abdul Hamid, Syamsul Bahrin, Y. A. M, Shawgi, Alang Md Rashid, Nahrul Khair

    Published 2014
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  19. 19
    SDN-Based VANET Routing: A Comprehensive Survey on Architectures, Protocols, Analysis, and Future Challenges

    SDN-Based VANET Routing: A Comprehensive Survey on Architectures, Protocols, Analysis, and Future Challenges by Hussein N.H., Koh S.P., Yaw C.T., Tiong S.K., Benedict F., Yusaf T., Kadirgama K., Hong T.C.

    Published 2025
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  20. 20
    Cryptographic protection of block-oriented storage devices using AES-XTS in FPGA

    Cryptographic protection of block-oriented storage devices using AES-XTS in FPGA by Ahmed, Shakil

    Published 2013
    “…In recent years security has been a common concern for the data in-transit between communication networks as well as data at-rest in storage devices. …”
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