Search Results - (( developing using descriptive algorithm ) OR ( java implication bees algorithm ))

Search alternatives:

Refine Results
  1. 1
    Automatic generation of user-defined test algorithm description file for memory BIST implementation

    Automatic generation of user-defined test algorithm description file for memory BIST implementation by Hussin, Razaidi, Jidin, Aiman Zakwan, Loh, Wan Ying, Mispan, Mohd Syafiq, Lee, Weng Fook

    Published 2022
    “…It can be used by implementing a standard testing algorithm available in the EDA tool library or a user-defined algorithm (UDA). …”
    Get full text
    Get full text
    Get full text
    Article
    Save to List
    Saved in:
  2. 2
    Development of real-time pose estimation algorithm for Quranic Arabic word

    Development of real-time pose estimation algorithm for Quranic Arabic word by Mohd Esa, Luqman Naim, Morshidi, Malik Arman, Mohd Zailani, Syarah Munirah

    Published 2017
    Get full text
    Get full text
    Get full text
    Get full text
    Article
    Save to List
    Saved in:
  3. 3
    Development of pose estimation algorithm for Quranic Arabic word

    Development of pose estimation algorithm for Quranic Arabic word by Mohd Esa, Luqman Naim, Morshidi, Malik Arman, Mohd Zailani, Syarah Munirah

    Published 2018
    Get full text
    Get full text
    Get full text
    Get full text
    Article
    Save to List
    Saved in:
  4. 4
    CAR TRACTION CONTROL SYSTEM

    CAR TRACTION CONTROL SYSTEM by MOHD ISMAIL, ADIBAH

    Published 2007
    “…In conclusion, it is possible to develop the algorithm for fuzzy - based car traction control system using VHDL. …”
    Get full text
    Get full text
    Final Year Project
    Save to List
    Saved in:
  5. 5
    Stochastic process and tutorial of the African buffalo optimization

    Stochastic process and tutorial of the African buffalo optimization by Odili, Julius Beneoluchi, Noraziah, Ahmad, Alkazemi, Basem, Zarina, M.

    Published 2022
    “…It is our belief that elaborate manual description of the workings of optimization algorithms make it user-friendly and encourage reproducibility of the experimental procedures performed using this algorithm. …”
    Get full text
    Get full text
    Get full text
    Article
    Save to List
    Saved in:
  6. 6
    Stochastic process and tutorial of the African bufalo optimization

    Stochastic process and tutorial of the African bufalo optimization by Odili, Julius Beneoluchi, Noraziah, Ahmad, Alkazemi, Basem Y., M., Zarina

    Published 2022
    “…It is our belief that elaborate manual description of the workings of optimization algorithms make it user-friendly and encourage reproducibility of the experimental procedures performed using this algorithm. …”
    Get full text
    Get full text
    Get full text
    Article
    Save to List
    Saved in:
  7. 7
    Three-Description Scalar And Lattice Vector Quantization Techniques For Efficient Data Transmission

    Three-Description Scalar And Lattice Vector Quantization Techniques For Efficient Data Transmission by Teo, Hui Ting

    Published 2015
    “…As this thesis suggests a new labeling algorithm that uses lattice 4 for three description MDC system. …”
    Get full text
    Get full text
    Thesis
    Save to List
    Saved in:
  8. 8
    Optimized feature construction methods for data summarizations of relational data

    Optimized feature construction methods for data summarizations of relational data by Sze, Florence Sia Fui

    Published 2014
    “…Many approaches have been developed to discover knowledge (i.e. useful information) from data stored in multiple tables in a relational database. …”
    Get full text
    Get full text
    Get full text
    Thesis
    Save to List
    Saved in:
  9. 9
    Booth’s Algorithm Design Using Field Programmable Gate Array

    Booth’s Algorithm Design Using Field Programmable Gate Array by Ab Hadi, Nik Azran, A Aziz, Khairul Azha, Hashim, Nik Mohd Zarifie, Omar, Muhammad Shukri, Jaafar, Anuar

    Published 2014
    “…The high speed operation and less space and energy required had made the digital devices more preferred.This project is to design digital system which performed fixed point Booth Multiplier Algorithm where the design system would be developed using hardware description language (HDL),in this case,VHDL (VHSIC Hardware Description Language),VHSIC stands for Very High Speed Integrated Circuit.In this project would be used Xilinx ISE 10.1which is the software used to designed digital system for Xilinx manufactured FPGA board.In Xilinx have two main languages which are VHDL and Verilog.For design Booth’s Multiplier Algorithm we used Verilog code which is has to create the program module and test bench.In that case,to design digital system will have input and output which is input is 8 bits and output is 16 bits.Finally, it is proven that the system created can calculate and yield a fixed point multiplied output of the input value. …”
    Get full text
    Get full text
    Get full text
    Article
    Save to List
    Saved in:
  10. 10
    Switching algorithm to avoid attitude representation singularity

    Switching algorithm to avoid attitude representation singularity by Okasha, Mohamed Elsayed Aly Abd Elaziz, Newman, Brett

    Published 2009
    “…In this paper, the singularity associated with a minimal attitude parameterization using Euler angles is avoided by a switching algorithm. …”
    Get full text
    Get full text
    Get full text
    Proceeding Paper
    Save to List
    Saved in:
  11. 11
    An improvement on the valiantbrebner hypercube data broadcasting technique / Nasaruddin Zenon

    An improvement on the valiantbrebner hypercube data broadcasting technique / Nasaruddin Zenon by Zenon, Nasaruddin

    Published 1990
    “…Section 2.0 provides the description of the Valiant and Brebner (V-B) algorithm. …”
    Get full text
    Get full text
    Article
    Save to List
    Saved in:
  12. 12
    VHDL modeling of EMG signal classification using artificial neural network

    VHDL modeling of EMG signal classification using artificial neural network by Ahsan, Md. Rezwanul, Ibrahimy, Muhammad Ibn, Khalifa, Othman Omran, Ullah, Mohammad Habib

    Published 2012
    “…VHDL (Very High Speed Integrated Circuit Hardware Description Language) has been used to model the algorithm implemented into the target device FPGA (Field Programmable Gate Array). …”
    Get full text
    Get full text
    Article
    Save to List
    Saved in:
  13. 13
    A step towards the development of VHDL model for ANN based EMG signal classifier

    A step towards the development of VHDL model for ANN based EMG signal classifier by Ahsan, Md. Rezwanul, Ibrahimy, Muhammad Ibn, Khalifa, Othman Omran

    Published 2012
    “…VHDL (Very High Speed Integrated Circuit Hardware Description Language) has been used to model the algorithm and which can be implemented into the target device FPGA (Field Programmable Gate Array). …”
    Get full text
    Get full text
    Get full text
    Proceeding Paper
    Save to List
    Saved in:
  14. 14
    Development of an efficient algorithm for fetal heart rate detection: a hardware approach

    Development of an efficient algorithm for fetal heart rate detection: a hardware approach by Ibrahimy, Muhammad Ibn, Reaz, Mamun Bin Ibne, Mohd Ali, Mohd Alauddin, T., H. Khoon, Ismail, Ahmad Faris

    Published 2006
    “…The algorithm was initially developed and simulated in Visual C++. …”
    Get full text
    Get full text
    Get full text
    Proceeding Paper
    Save to List
    Saved in:
  15. 15
    Development of computer aided three-dimensional geometric modeler based on designer's idea in twodimensional

    Development of computer aided three-dimensional geometric modeler based on designer's idea in twodimensional by Haron, Habibollah

    Published 2006
    Get full text
    Get full text
    Monograph
    Save to List
    Saved in:
  16. 16
    VHDL implementation of DES algorithm / Emmanvel Kajan Mering

    VHDL implementation of DES algorithm / Emmanvel Kajan Mering by Emmanvel, Kajan Mering

    Published 2004
    Get full text
    Get full text
    Thesis
    Save to List
    Saved in:
  17. 17
    16 bits x 16 bits booth multiplier using VHDL

    16 bits x 16 bits booth multiplier using VHDL by Muhammad Syafiq, Norashid

    Published 2008
    “…This project is to design digital system which performed fixed point Booth Multiplier where the design system would be developed using hardware description language (HDL), in this case, VHDL (VHSIC Hardware Description Language), VHSIC stands for Very High Speed Integrated Circuit. …”
    Get full text
    Get full text
    Undergraduates Project Papers
    Save to List
    Saved in:
  18. 18
    Development of obstable avoidance system for 3D robot navigation

    Development of obstable avoidance system for 3D robot navigation by Er, Kai Sheng

    Published 2024
    “…In conclusion, the developed algorithm enables the robot to detect obstacles that are not on the same plane as the 2D LiDAR and cannot be detected using depth camera data.…”
    Get full text
    Get full text
    Final Year Project / Dissertation / Thesis
    Save to List
    Saved in:
  19. 19
    Implementation of PRINCE algorithm in FPGA

    Implementation of PRINCE algorithm in FPGA by Abbas Y.A., Jidin R., Jamil N., Z'aba M.R., Rusli M.E., Tariq B.

    Published 2023
    Conference Paper
    Save to List
    Saved in:
  20. 20
    Data mining techniques for disease risk prediction model: A systematic literature review

    Data mining techniques for disease risk prediction model: A systematic literature review by Ahmad W.M.T.W., Ghani N.L.A., Drus S.M.

    Published 2023
    Conference Paper
    Save to List
    Saved in:

Search Tools: