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OPTIMIZED MIN-MIN TASK SCHEDULING ALGORITHM FOR SCIENTIFIC WORKFLOWS IN A CLOUD ENVIRONMENT by Murad S.S., Badeel R., Alsandi N.S.A., Alshaaya R.F., Ahmed R.A., Muhammed A., Derahman M.

“…To achieve this, we propose a new noble mechanism called Optimized Min-Min (OMin-Min) algorithm, inspired by the Min-Min algorithm. The objectives of this work are: i) to provide a comprehensive review of the cloud and scheduling process; ii) to classify the scheduling strategies and scientific workflows; iii) to implement our proposed algorithm with various scheduling algorithms (i.e., Min-Min, Round-Robin, Max-Min, and Modified Max-Min) for performance comparison, within different cloudlet sizes (i.e., small, medium, large, and heavy) in three scientific workflows (i.e., Montage, Epigenomics, and SIPHT); and iv) to investigate the performance of the implemented algorithms by using CloudSim. …”

Batch mode heuristic approaches for efficient task scheduling in grid computing system by Maipan-Uku, Jamilu Yahaya

“…Many algorithms have been implemented to solve the grid scheduling problem. …”
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SG-PBFS : Shortest Gap-Priority Based Fair Scheduling technique for job scheduling in cloud environment by Murad, Saydul Akbar, Zafril Rizal, M. Azmi, Muzahid, Abu Jafar Md, Bhuiyan, Md Khairul Bashar, Saib, Md, Rahimi, Nick, Prottasha, Nusrat Jahan, Bairagi, Anupam Kumar

“…To conduct this experiment, we employed the CloudSim simulator, which is implemented using the Java programming language.…”
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An Efficient Energy Aware Adaptive System-On-Chip Architecture For Real-Time Video Analytics by Ahmed, Hisham Ahmed Ali

“…A Performance model for Zynq is developed using analytical method and used in hardware/software codesign to facilitate algorithms mapping to hardware. …”
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Minimization of torque ripple and flux droop using optimal DTC switching and sector rotation strategy by Ahmad Tarusan, Siti Azura

“…MATLAB/Simulink software is used to simulate the proposed strategies while a complete setup system consists of a DS1104 digital signal processor (DSP)-board (to implement the DTC algorithm), Field-programmable Gate Arrays (FPGA) (to implement the blanking circuit), two-level and five-level (CHB) inverter circuit, gate driver circuit, and a 1.1 kW induction motor with 2 kW DC generator as a load is developed for testing and verification purpose. …”
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