Search Results - (( developing programme gets algorithm ) OR ( java swarm optimization algorithm ))

Attribute reduction based scheduling algorithm with enhanced hybrid genetic algorithm and particle swarm optimization for optimal device selection by Nwogbaga, Nweso Emmanuel, Latip, Rohaya, Affendey, Lilly Suriani, Abdul Rahiman, Amir Rizaan

“…Enhance hybrid genetic algorithm and particle Swarm optimization are developed to select the optimal device in either fog or cloud. …”
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Enhancement of Ant Colony Optimization for Grid Job Scheduling and Load Balancing by Husna, Jamal Abdul Nasir

“…A simulation environment was developed using Java programming to test the performance of the proposed EACO algorithm against existing grid resource management algorithms such as Antz algorithm, Particle Swarm Optimization algorithm, Space Shared algorithm and Time Shared algorithm, in terms of processing time and resource utilization. …”
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Features selection for intrusion detection system using hybridize PSO-SVM by Tabaan, Alaa Abdulrahman

“…Hybridize Particle Swarm Optimization (PSO) as a searching algorithm and support vector machine (SVM) as a classifier had been implemented to cope with this problem. …”
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An ensemble learning method for spam email detection system based on metaheuristic algorithms by Behjat, Amir Rajabi

“…In order to address the challenges that mentioned above in this study, in the first phase, a novel architecture based on ensemble feature selection techniques include Modified Binary Bat Algorithm (NBBA), Binary Quantum Particle Swarm Optimization (QBPSO) Algorithm and Binary Quantum Gravita tional Search Algorithm (QBGSA) is hybridized with the Multi-layer Perceptron (MLP) classifier in order to select relevant feature subsets and improve classification accuracy. …”
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Design and analysis of high performance matrix filling for DNA sequence alignment accelerator using asic design flow: article / Nurzaima Mahmod by Mahmod, Nurzaima

“…To optimize the performance of the algorithm by exploiting parallelism in the design several techniques have been developed. …”
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Design and analysis of high performance matrix filling for DNA sequence alignment accelerator using ASIC design flow / Nurzaima Mahmod by Mahmod, Nurzaima

“…To optimize the performance of the algorithm by exploiting parallelism in the design several techniques have been developed. …”
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Hardware And Software Partitioning Using Genetic Algorithm In Image Processing Application by Loo, Fang Hean

“…In this project, HW-SW Partitioning is used as a process to map each task of image processing application to be executed either in software (Hard Processor System, HPS) or hardware (Field Programmable Gate Array, FPGA). The framework for HW-SW Partitioning using Genetic Algorithm (GA) is developed in MATLAB. …”
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A Malay Chatterbot by Lokman, Aina Fatiha

“…The simplicity of AIML makes it easy for non-programmers, especially those who already knowHTML, to get started writing chat robots.…”
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Design and Implementation of Advanced Encryption Standard Using Verilog HDL by Shamsiah, Suhaili, Rene Brooke, Fredrick, Zainah, Md. Zain, Norhuzaimin, Julai

“…The focus of this paper is to match with the existing cryptography algorithm, 128-bit Advanced Encryption Algorithm and improving the processing speed for the design with hardware implementation. …”
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A cluster analysis of population based cancer registry in Brunei Darussalam : an exploratory study by Lai, Daphne Teck Ching, Owais A. Malik

“…The top three prevalent cancers associated with these subgroups were consistently identified using the three algorithms. Upon comparing the subgroups’ ages during diagnosis, we identify possible screening behaviours of specific subgroups, suggesting for early screening awareness programmes. …”
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Design and implementation of advanced encryption standard using verilog HDL by Shamsiah, Suhaili, Fredrick, Rene Brooke, Zainah, Md. Zain, Norhuzaimin, Julai

“…The focus of this paper is to match with the existing cryptography algorithm, 128-bit Advanced Encryption Algorithm and improving the processing speed for the design with hardware implementation. …”
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Development of low cost 3D scanner (LC3S) using Matlab and FPGA / Abdul Rais Abdul Rahim ...[et al.] by Abdul Rahman, Abdul Rais, Abdol Rahman, Mohd Adli, Ramli, Muhammad Azizi, Saparon, Azilah

“…Nowadays, three dimensional (3D) scanners are getting more popular with the advancement and development in technology. …”
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A review on path collisions and resources usage in hybrid optical Network on Chip (HONoC) by Razali R.A., Othman M.

Enhancing obfuscation technique for protecting source code against software reverse engineering by Mahfoudh, Asma

“…There is also a need to develop a tool that contains the three approaches where the developer can customize the protection of the source code.…”
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Cryptographic protection of block-oriented storage devices using AES-XTS in FPGA by Ahmed, Shakil

“…Also the parallel AES-XTS encryption and decryption design were used to develop integrated chip of AES-XTS on FPGA. The results show that pipelined implementation has outperformed all other implementations. …”
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