Search Results - (( developing programme boost algorithm ) OR ( java realization based algorithm ))

  • Showing 1 - 7 results of 7
Refine Results
  1. 1
  2. 2

    Mathematical simulation for 3-dimensional temperature visualization on open source-based grid computing platform by Alias, Norma, Satam, Noriza, Abd. Ghaffar, Zarith Safiza, Darwis, Roziha, Hamzah, Norhafiza, Islam, Md. Rajibul

    Published 2009
    “…The development of this architecture is based on several programming language as it involves algorithm implementation on C, parallelization using Parallel Virtual Machine (PVM) and Java for web services development. …”
    Get full text
    Get full text
    Get full text
    Conference or Workshop Item
  3. 3

    Collaborative-based web recommender system for community-driven homestay programmes by Miraz, Mahadi Hasan

    Published 2017
    “…All these operations are carried out simultaneously to boost the functions of the CBWR system. Hence, this research contributes to the development of a specific unique web database and a CBWR system, which is adopted from collaborative algorithm. …”
    Get full text
    Get full text
    Get full text
    Get full text
    Thesis
  4. 4

    Embedded system for indoor guidance parking with Dijkstra’s algorithm and ant colony optimization by Mohammad Ata, Karimeh Ibrahim

    Published 2019
    “…The circuits have been designed by proteus, the microcontrollers have been programmed by micro C, and the Graphical User Interface (GUI) has been implemented in Java. Few by electronic components such as RFID, multiplexer, XBee, and servo motors have been used to realize the system. …”
    Get full text
    Get full text
    Thesis
  5. 5

    Instruction Set Extension Of A Low-End Reconfigurable Microcontroller In Bit-Sorting Implementation by Salim, Sani Irwan, Soo, Yew Guan, Samsudin, Sharatul Izah

    Published 2018
    “…The modules’ integration is implemented using instruction set architecture (ISA) extension technique and is developed on the Field Programmable Gate Array (FPGA). …”
    Get full text
    Get full text
    Get full text
    Article
  6. 6

    Application Specific Instruction Set Processor (ASIP) Design In An 8-Bit Softcore Microcontroller by Salim, Sani Irwan, Soo, Yew Guan, Samsudin, Sharatul Izah

    Published 2018
    “…The modules’ integration is implemented using ASIP design without occurring extra board space and is developed using the Field Programmable Gate Array (FPGA) as the single chip solutions. …”
    Get full text
    Get full text
    Get full text
    Article
  7. 7

    Dynamic force-directed graph with weighted nodes for scholar network visualization by Mohd. Aris, Khalid Al-Walid, Ramasamy, Chitra, Mohd Aris, Teh Noranis, Zolkepli, Maslina

    Published 2022
    “…A scholar network visualization approach is proposed to help users to explore a large number of academic publications concerning the strength of the relationship between each publication. The approach is realized by creating a web-based interface using D3 JavaScript algorithm that allows the visualization to focus on how data are connected to each other more accurately than the conventional lines of data seen in traditional data representation. …”
    Get full text
    Get full text
    Article