Search Results - (( developing programme boost algorithm ) OR ( java implementation svm algorithm ))

Features selection for intrusion detection system using hybridize PSO-SVM by Tabaan, Alaa Abdulrahman

“…Hybridize Particle Swarm Optimization (PSO) as a searching algorithm and support vector machine (SVM) as a classifier had been implemented to cope with this problem. …”
Get full text
Get full text

Adoption of machine learning algorithm for analysing supporters and non supporters feedback on political posts / Ogunfolajin Maruff Tunde by Ogunfolajin Maruff , Tunde

“…The support vector machines (SVM) algorithm obtained the overall best results of 94.5% accuracy, 91.8% precision, 91.7% recall, and 91.1% f-Measure while the naïve bayes (NB) algorithm obtained the best AUC score of 0.944 with the tweet data of Dato Seri Anwar. …”
Get full text
Get full text
Get full text

Beyond Grades - Predicting Programme Learning Outcomes with Multi-Output Regression in Malaysian Higher Education by Muhammad Noorazizi Abd Ghani, Istas Fahrurrazi Nusyirwan

Collaborative-based web recommender system for community-driven homestay programmes by Miraz, Mahadi Hasan

“…All these operations are carried out simultaneously to boost the functions of the CBWR system. Hence, this research contributes to the development of a specific unique web database and a CBWR system, which is adopted from collaborative algorithm. …”
Get full text
Get full text
Get full text
Get full text

Instruction Set Extension Of A Low-End Reconfigurable Microcontroller In Bit-Sorting Implementation by Salim, Sani Irwan, Soo, Yew Guan, Samsudin, Sharatul Izah

“…The modules’ integration is implemented using instruction set architecture (ISA) extension technique and is developed on the Field Programmable Gate Array (FPGA). …”
Get full text
Get full text
Get full text

Application Specific Instruction Set Processor (ASIP) Design In An 8-Bit Softcore Microcontroller by Salim, Sani Irwan, Soo, Yew Guan, Samsudin, Sharatul Izah

“…The modules’ integration is implemented using ASIP design without occurring extra board space and is developed using the Field Programmable Gate Array (FPGA) as the single chip solutions. …”
Get full text
Get full text
Get full text