Search Results - (( developing programme boost algorithm ) OR ( java implementation max algorithm ))

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  1. 1

    OPTIMIZED MIN-MIN TASK SCHEDULING ALGORITHM FOR SCIENTIFIC WORKFLOWS IN A CLOUD ENVIRONMENT by Murad S.S., Badeel R., Alsandi N.S.A., Alshaaya R.F., Ahmed R.A., Muhammed A., Derahman M.

    Published 2023
    “…To achieve this, we propose a new noble mechanism called Optimized Min-Min (OMin-Min) algorithm, inspired by the Min-Min algorithm. The objectives of this work are: i) to provide a comprehensive review of the cloud and scheduling process; ii) to classify the scheduling strategies and scientific workflows; iii) to implement our proposed algorithm with various scheduling algorithms (i.e., Min-Min, Round-Robin, Max-Min, and Modified Max-Min) for performance comparison, within different cloudlet sizes (i.e., small, medium, large, and heavy) in three scientific workflows (i.e., Montage, Epigenomics, and SIPHT); and iv) to investigate the performance of the implemented algorithms by using CloudSim. …”
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  2. 2

    Batch mode heuristic approaches for efficient task scheduling in grid computing system by Maipan-Uku, Jamilu Yahaya

    Published 2016
    “…Many algorithms have been implemented to solve the grid scheduling problem. …”
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    Collaborative-based web recommender system for community-driven homestay programmes by Miraz, Mahadi Hasan

    Published 2017
    “…All these operations are carried out simultaneously to boost the functions of the CBWR system. Hence, this research contributes to the development of a specific unique web database and a CBWR system, which is adopted from collaborative algorithm. …”
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    Instruction Set Extension Of A Low-End Reconfigurable Microcontroller In Bit-Sorting Implementation by Salim, Sani Irwan, Soo, Yew Guan, Samsudin, Sharatul Izah

    Published 2018
    “…The modules’ integration is implemented using instruction set architecture (ISA) extension technique and is developed on the Field Programmable Gate Array (FPGA). …”
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  7. 7

    Application Specific Instruction Set Processor (ASIP) Design In An 8-Bit Softcore Microcontroller by Salim, Sani Irwan, Soo, Yew Guan, Samsudin, Sharatul Izah

    Published 2018
    “…The modules’ integration is implemented using ASIP design without occurring extra board space and is developed using the Field Programmable Gate Array (FPGA) as the single chip solutions. …”
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