Search Results - (( developing programme boost algorithm ) OR ( java _ optimisation algorithm ))

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  1. 1

    Study and Implementation of Data Mining in Urban Gardening by Mohana, Muniandy, Lee, Eu Vern

    Published 2019
    “…The system is essentially a three-part development, utilising Android, Java Servlets, and Arduino platforms to create an optimised and automated urban-gardening system. …”
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  3. 3

    Collaborative-based web recommender system for community-driven homestay programmes by Miraz, Mahadi Hasan

    Published 2017
    “…All these operations are carried out simultaneously to boost the functions of the CBWR system. Hence, this research contributes to the development of a specific unique web database and a CBWR system, which is adopted from collaborative algorithm. …”
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  4. 4

    A framework of test case prioritisation in regression testing using particle swarm-artificial bee colony algorithm by Ba-Quttayyan, Bakr Salim Abdullah

    Published 2024
    “…The TCP process involves optimising test cases by rearranging them effectively to achieve a performance goal, such as early fault detection. …”
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  5. 5

    Web-based expert system for material selection of natural fiber- reinforced polymer composites by Ahmed Ali, Basheer Ahmed

    Published 2015
    “…The decision of selecting optimised materials was complicated, as it involves diversified choice of materials, coupled with various influencing criteria for the selection. …”
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  6. 6

    Instruction Set Extension Of A Low-End Reconfigurable Microcontroller In Bit-Sorting Implementation by Salim, Sani Irwan, Soo, Yew Guan, Samsudin, Sharatul Izah

    Published 2018
    “…The modules’ integration is implemented using instruction set architecture (ISA) extension technique and is developed on the Field Programmable Gate Array (FPGA). …”
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  7. 7

    Application Specific Instruction Set Processor (ASIP) Design In An 8-Bit Softcore Microcontroller by Salim, Sani Irwan, Soo, Yew Guan, Samsudin, Sharatul Izah

    Published 2018
    “…The modules’ integration is implemented using ASIP design without occurring extra board space and is developed using the Field Programmable Gate Array (FPGA) as the single chip solutions. …”
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