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  1. 1
    Design of an advanced encryption standard crypto-processor core for field programmable gate array implementation

    Design of an advanced encryption standard crypto-processor core for field programmable gate array implementation by Ismail, Mohd. Izuan

    Published 2006
    “…The processors perform their respective dedicated algorithm-intensive computations. …”
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  2. 2
    Hybrid scheduling and dual queue scheduling

    Hybrid scheduling and dual queue scheduling by Mahmood, Ahmad Kamil

    Published 2009
    “…Our research work involves the design and development of new CPU scheduling algorithms (the Hybrid Scheduling Algorithm and the Dual Queue Scheduling Algorithm) with a view to optimization. …”
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  3. 3
    Peningkatan halaju suapan maksimum penginterpolasi CNC dedenyut rujukan menggunakan pengaturcaraan selari

    Peningkatan halaju suapan maksimum penginterpolasi CNC dedenyut rujukan menggunakan pengaturcaraan selari by Ahmad Fakhri, Ab. Nasir

    Published 2011
    “…The proposed interpolator is ready for new era of multi-processors.…”
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  4. 4
    Hybrid scheduling and dual queue scheduling

    Hybrid scheduling and dual queue scheduling by A., Oxley, S.N.M., Shah, A.K., Mahmood

    Published 2009
    “…Our research work involves the design and development of new CPU scheduling algorithms (the Hybrid Scheduling Algorithm and the Dual Queue Scheduling Algorithm) with a view to optimization. …”
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  5. 5
    Parallel Optical Window Algorithm Applied to Optical Multistage Interconnection Network

    Parallel Optical Window Algorithm Applied to Optical Multistage Interconnection Network by Othman, Mohamed, Abdullah, Monir, Johari, Rozita

    Published 2008
    “…The BPMW algorithm reduces the execution time by a percentage of 83% of the time compared to the sequential algorithm with seven processors.…”
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  6. 6
    Ray Casting for Iso-surface in Volumetric Data

    Ray Casting for Iso-surface in Volumetric Data by Ngoc Anh, Do Hoang

    Published 2005
    “…The thesis includes a proposal of new multisampling algorithm, which significantly reduces rendering time while producing similar quality of image with existing algorithms.…”
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  7. 7
    Fast Finite Difference Time Domain Algorithms for Solving Antenna Application Problem

    Fast Finite Difference Time Domain Algorithms for Solving Antenna Application Problem by Hasan, Mohammad Khatim

    Published 2008
    “…The objective of the thesis is to develop new sequential and parallel algorithms that are faster than the standard Finite Difference Time Domain method. …”
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  8. 8
    Parallel Diagonally Implicit Runge-Kutta Methods For Solving Ordinary Differential Equations

    Parallel Diagonally Implicit Runge-Kutta Methods For Solving Ordinary Differential Equations by Din, Ummul Khair Salma

    Published 2009
    “…In the first part of the thesis, a fifth order DIRK suitable for two processors parallel executions and DIRK methods of fourth and fifth orders suitable for three processors are proposed. …”
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  9. 9
    Evaluation of reference signal estimation techniques for the control of shunt active power filter

    Evaluation of reference signal estimation techniques for the control of shunt active power filter by Atan N.B., Yunus B.B.

    Published 2023
    Conference paper
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  10. 10
    A new parallel model for starter sets generation via exchanging two elements

    A new parallel model for starter sets generation via exchanging two elements by Karim, Sharmila, Omar, Zurni, Ibrahim, Haslinda

    Published 2019
    “…However, this drawback can be overcome by running the task using several processors. In this study, a technique of parallelization across the method was employed to develop new parallel algorithm for finding all permutations under exchanged restrictions. …”
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  11. 11
    Parallel direct integration variable step block method for solving large system of higher order ordinary differential equations.

    Parallel direct integration variable step block method for solving large system of higher order ordinary differential equations. by Abdul Majid, Zanariah, Suleiman, Mohamed

    Published 2009
    “…The algorithm of the method was developed in C language and the parallel computation was done on a parallel shared memory environment. …”
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  12. 12
    Implementation and simplification of an Output Shifted Coding Modulation (OSCM) on a high speed DSP processor / Roslina Mohamad, Wan Nor Syafizan Wan Muhamad and Rosmalini Abdul Kadir

    Implementation and simplification of an Output Shifted Coding Modulation (OSCM) on a high speed DSP processor / Roslina Mohamad, Wan Nor Syafizan Wan Muhamad and Rosmalini Abdul Ka... by Mohamad, Roslina, Wan Muhamad, Wan Nor Syafizan, Abdul Kadir, Rosmalini

    Published 2009
    “…The new coded modulation is called as Output Shifted Coding Modulation (OSCM). …”
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    Research Reports
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  13. 13
    New Quarter-Sweep-Based Accelerated Over-Relaxation Iterative Algorithms and their Parallel Implementations in Solving the 2D Poisson Equation

    New Quarter-Sweep-Based Accelerated Over-Relaxation Iterative Algorithms and their Parallel Implementations in Solving the 2D Poisson Equation by Rakhimov, Shukhrat

    Published 2010
    “…The parallel strategies used in the new algorithms are based on the message latency minimization and processor-independent iterations.…”
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  14. 14
    Proposed algorithm for scheduling in computational grid using backfilling and optimization techniques

    Proposed algorithm for scheduling in computational grid using backfilling and optimization techniques by Dakkak, Omar, Awang Nor, Shahrudin, Che Mohamed Arif, Ahmad Suki

    Published 2016
    “…To allocate the suitable resources for the incoming jobs, a scheduling algorithm has to manage this process.In this paper, we provide a critical review the recent mechanisms in “grid computing” environment.In addition, we propose a new scheduling algorithm to minimize the delay for the end user, Gap Filling policy will be applied to improve the performance of the priority algorithm.Then, an optimization algorithm will perform in order to further enhance the initial result for that obtained from backfilling mechanism.The main aim of the proposed scheduling mechanism is to improve the QoS for the end user in a real grid computing environment.…”
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  15. 15
    Three phase induction motor coupled to DC motor in hybrid electric vehicle application

    Three phase induction motor coupled to DC motor in hybrid electric vehicle application by Zulkarnain, Lubis

    Published 2011
    “…Software in the-loop (SIL) and hardware-in-the-loop (HIL) simulations have been performed for induction motor with electric vehicle load to verify the performance of the new algorithm as well as to tune the control parameters. …”
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  16. 16
    Simplified adaptive linear neuron harmonics extraction algorithm for dynamic performance of shunt active power filter

    Simplified adaptive linear neuron harmonics extraction algorithm for dynamic performance of shunt active power filter by Mohd Zainuri, Muhammad Ammirrul Atiqi, Mohd Radzi, Mohd Amran, Che Soh, Azura, Mariun, Norman, Abd Rahim, Nasrudin

    Published 2016
    “…The SAPF with the proposed harmonics extraction algorithm was simulated in MATLAB/Simulink. For practical validation, the experimental laboratory prototype was also developed, and the algorithm was implemented using Digital Signal Processor TMS320F28335. …”
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  17. 17
    Enhanced control algorithms for multilevel inverter-based shunt active power filter

    Enhanced control algorithms for multilevel inverter-based shunt active power filter by Hoon, Yap

    Published 2017
    “…Moreover, a laboratory prototype is developed with all the proposed control algorithms downloaded in TMS320F28335 digital signal processor (DSP) board for validation purposes. …”
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  18. 18
    Optimized fast fourier transform architecture using instruction set architecture extension in low-end digital signal controller

    Optimized fast fourier transform architecture using instruction set architecture extension in low-end digital signal controller by Salim, Sani Irwan

    Published 2018
    “…Compared to the initial processor architecture, the support of extended ISA has increased the UTeMRISC core by 21.8% but at the same time allows to execute Fast Fourier Transform algorithm up to 5× faster. …”
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  19. 19
    Lightweight PRINCE algorithm IP core for securing GSM messaging using FPGA

    Lightweight PRINCE algorithm IP core for securing GSM messaging using FPGA by Abbas Y.A., Jidin R., Jamil N., Z'aba M.R.

    Published 2023
    “…An energy and cost-efficient implementation of PRINCE algorithm implemented in an environment of a microprocessor system using XILINX FPGA board is developed. …”
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  20. 20
    Photovoltaic shunt active power filter based on indirect self-charging with step size error cancellation and simplified adaptive linear neuron

    Photovoltaic shunt active power filter based on indirect self-charging with step size error cancellation and simplified adaptive linear neuron by Mohd Zainuri, Muhammad Ammirrul Atiqi

    Published 2017
    “…Laboratory prototype was then developed and digital signal processor (DSP) TMS320F28335 was used to perform the computation of algorithms. …”
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