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  1. 1
    A performance analysis of association rule mining algorithms

    A performance analysis of association rule mining algorithms by Fageeri, S.O., Ahmad, R., Alhussian, H.

    Published 2016
    “…In this paper, we evaluate the performance of association rule mining algorithms in-terms of execution times and memory usage using the CPU profiler of Java VisualVM. …”
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  2. 2
    Performance evaluation of real-time multiprocessor scheduling algorithms

    Performance evaluation of real-time multiprocessor scheduling algorithms by Alhussian, H., Zakaria, N., Abdulkadir, S.J., Fageeri, S.O.

    Published 2016
    “…We hyave used the CPU profiler of Oracle JavaTM VisualVM to monitor the execution of LRE-TL as well as USG algorithms. …”
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  3. 3
    Visdom: Smart guide robot for visually impaired people

    Visdom: Smart guide robot for visually impaired people by Lee, Zhen Ting

    Published 2025
    “…An Android mobile application, developed using Java and the java.net.Socket library, provides an intuitive and accessible user interface for seamless interaction with the robot. …”
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  4. 4
    VHDL implementation of DES algorithm / Emmanvel Kajan Mering

    VHDL implementation of DES algorithm / Emmanvel Kajan Mering by Emmanvel, Kajan Mering

    Published 2004
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  5. 5
    Dynamic Feedback Flow Control Algorithms for Unicast and Multicast Available Bit Rate Service in Asynchronous Transfer Mode Networks

    Dynamic Feedback Flow Control Algorithms for Unicast and Multicast Available Bit Rate Service in Asynchronous Transfer Mode Networks by Abdelrahman, Ali Mohamed

    Published 2000
    “…Thirdly, the design and implementation issues have been addressed together with the major drawbacks of the previous schemes and hence two algorithms have been proposed. A dynamic rate-based flow control (DRFC) scheme has been developed to support ABR service in unicast environment, while an adaptive feedback consolidation (AFC) algorithm has been designed for ABR multicasting. …”
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  6. 6
    Optimization of Digital Electronic Circuit Structure Design Using Genetic Algorithm

    Optimization of Digital Electronic Circuit Structure Design Using Genetic Algorithm by Chong, Kok Hen

    Published 2008
    “…A number of experiments are implemented to design 3-bit, 4-bit, 5-bit and 6-bit circuits. …”
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  7. 7
    A new 128-bit block cipher

    A new 128-bit block cipher by Mohd Ali, Fakariah Hani

    Published 2009
    “…Towards that and after reviewing related research, in this research we propose to come up with a new 128-bit block cipher cryptographic algorithm which shall meet the security requirements. …”
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  8. 8
    16 bits x 16 bits booth multiplier using VHDL

    16 bits x 16 bits booth multiplier using VHDL by Muhammad Syafiq, Norashid

    Published 2008
    “…The designed digital system will receive two 16 bits input and processes it to create a 32 bits output with the value of the multiplied inputs data value. …”
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  9. 9
    Implementation of High Speed Large Integer Multiplication Algorithm on Contemporary Architecture

    Implementation of High Speed Large Integer Multiplication Algorithm on Contemporary Architecture by Chang, Boon Chiao

    Published 2018
    “…To achieve certain level of security, Public Key Cryptography algorithm is performed on large integer that is more than 64-bit, typical bit size supported by conventional Central Processing Unit (CPU) (e.g. 512-bit for Elliptic Curve Cryptography (ECC), 2048-bit for Rivest-Shamir-Adleman (RSA) and million bits for Fully Homomorphic Encryption (FHE)). …”
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  10. 10
    Web-based RIG performance reporting system using interactive visualization techniques / Amir Hambaly Nasaruddin

    Web-based RIG performance reporting system using interactive visualization techniques / Amir Hambaly Nasaruddin by Nasaruddin, Amir Hambaly

    Published 2019
    “…D3.js is used as a technology to visualize the result in interactive form or dynamic visualization which is a JavaScript library and Python is a language to program the system. …”
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  11. 11
    A Study And Development Of Digital Control Technique For Power Factor Correction Using Pre-Calculated Algorithm With A Low Cost 8-Bit Microcontroller

    A Study And Development Of Digital Control Technique For Power Factor Correction Using Pre-Calculated Algorithm With A Low Cost 8-Bit Microcontroller by Liau , Wei Chun

    Published 2013
    “…The mature manufacturing technologies in digital devices has led to the proliferation of powerful yet low cost digital controllers and enable the possibility of digital power factor correction implementation in a more competitive way. A digital control technique for power factor correction using pre-calculated algorithm with a low cost 8-bit microcontroller is studied and presented in this paper. …”
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  12. 12
    Enhanced bibliographic data retrieval and visualization using query optimization and spectral centrality measure

    Enhanced bibliographic data retrieval and visualization using query optimization and spectral centrality measure by Ramasamy, Chitra, Zolkepli, Maslina

    Published 2019
    “…This study proposing an enhance bibliographic data retrieval and visualization using hybrid clustering method consists of K-harmonic mean (KHM) and Spectral Algorithm and eigenvector centrality measure. …”
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  13. 13
    Instruction Set Extension Of A Low-End Reconfigurable Microcontroller In Bit-Sorting Implementation

    Instruction Set Extension Of A Low-End Reconfigurable Microcontroller In Bit-Sorting Implementation by Salim, Sani Irwan, Soo, Yew Guan, Samsudin, Sharatul Izah

    Published 2018
    “…Extensive simulations were performed with the and a comprehensive methodology is proposed. It was found that the ISA extension from 12-bit to 16-bit has produced a faster execution time with fewer resource utilization when implementing the bit-sorting algorithm. …”
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  14. 14
    Design of a floating point unit for 32-bit 5 stage pipeline processor

    Design of a floating point unit for 32-bit 5 stage pipeline processor by Low, Wai Hau

    Published 2020
    “…Also, a dedicated register file is developed for FPU to store 32-bits or 64- bits of data. …”
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  15. 15
    A novel embedding method to increase capacity and robustness of low-bit encoding audio steganography technique using noise gate software logic algorithm

    A novel embedding method to increase capacity and robustness of low-bit encoding audio steganography technique using noise gate software logic algorithm by Ahmed, M.A., Kiah, M.L.M., Zaidan, B.B., Zaidan, A.A.

    Published 2010
    “…In this study, we developed a novel method that is able to shift the limit for transparent data hiding in audio from the fourth LSB layer to the eighth LSB layer, thus the method has improved the capacity and robustness of data hiding in the audio file using a two steps approach. …”
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  16. 16
    Steganography based on utilizing more surrounding pixels

    Steganography based on utilizing more surrounding pixels by Afrakhteh, Masoud

    Published 2010
    “…The purpose of this study is to investigate the application of least significant bit insertion method (LSB) in concealing a definite amount of message bits inside a typical media such as an 8-bit gray-scale image and develop an alternative model structure selection algorithm based on considering more surrounding pixels in order to compute the best capacity value for each target pixel. …”
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  17. 17
    Analysis of parabolic antennas for radio telescopes and the development of encryption methods for radio astronomical images

    Analysis of parabolic antennas for radio telescopes and the development of encryption methods for radio astronomical images by Ting, Kung Chuang

    Published 2022
    “…The results showed that this algorithm has better performance compared to other recently developed algorithms. …”
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  18. 18
    A block cipher based on genetic algorithm

    A block cipher based on genetic algorithm by Zakaria, Nur Hafiza

    Published 2016
    “…The structure of the components has a fixed block size which is 128 bits and a key size of 128 bits. …”
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  19. 19
    Design Of Robot Motion Planning Algorithm For Wall Following Robot

    Design Of Robot Motion Planning Algorithm For Wall Following Robot by Ali Hassan, Muhamad Khairul

    Published 2006
    “…Algorithms are developed for a simulated mobile robot that uses an array of range finders for navigation. …”
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  20. 20
    Resource allocation technique for powerline network using a modified shuffled frog-leaping algorithm

    Resource allocation technique for powerline network using a modified shuffled frog-leaping algorithm by Altrad, Abdallah Mahmoud Mousa

    Published 2018
    “…The main goal of this work is to develop a conceptual framework and mathematical model for resource allocation using Shuffled Frog-Leap Algorithm (SFLA). …”
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