Search Results - (( developing a bit algorithm ) OR ( java application system algorithm ))

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  1. 1

    SANAsms: Secure short messaging system for secure GSM mobile communication by Anuar, N.B., Azlan, I.M., Wahid, A.W.A., Zakaria, O.

    Published 2008
    “…The system is developed using Java 2 Micro Edition (J2ME) which is written in Java. …”
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    Conference or Workshop Item
  2. 2

    Prevention And Detection Mechanism For Security In Passive Rfid System by Khor, Jing Huey

    Published 2013
    “…A GUI is created in a form of JAVA application to display data detected from tag. …”
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    Thesis
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    Dynamic Feedback Flow Control Algorithms for Unicast and Multicast Available Bit Rate Service in Asynchronous Transfer Mode Networks by Abdelrahman, Ali Mohamed

    Published 2000
    “…Thirdly, the design and implementation issues have been addressed together with the major drawbacks of the previous schemes and hence two algorithms have been proposed. A dynamic rate-based flow control (DRFC) scheme has been developed to support ABR service in unicast environment, while an adaptive feedback consolidation (AFC) algorithm has been designed for ABR multicasting. …”
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    Thesis
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    Real-time algorithmic music composition application. by Yap, Alisa Yi Hui

    Published 2022
    “…In addition, the system also utilises JavaFx and jFugue for its graphical user interface and music programming respectively. …”
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    Final Year Project / Dissertation / Thesis
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    Route Optimization System by Zulkifli, Abdul Hayy

    Published 2005
    “…After much research into the many algorithms available, and considering some, including Genetic Algorithm (GA), the author selected Dijkstra's Algorithm (DA). …”
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    Final Year Project
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    Optimization of Digital Electronic Circuit Structure Design Using Genetic Algorithm by Chong, Kok Hen

    Published 2008
    “…A number of experiments are implemented to design 3-bit, 4-bit, 5-bit and 6-bit circuits. …”
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    Thesis
  11. 11

    A new 128-bit block cipher by Mohd Ali, Fakariah Hani

    Published 2009
    “…Towards that and after reviewing related research, in this research we propose to come up with a new 128-bit block cipher cryptographic algorithm which shall meet the security requirements. …”
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    Thesis
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    16 bits x 16 bits booth multiplier using VHDL by Muhammad Syafiq, Norashid

    Published 2008
    “…The designed digital system will receive two 16 bits input and processes it to create a 32 bits output with the value of the multiplied inputs data value. …”
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    Undergraduates Project Papers
  14. 14

    Implementation of High Speed Large Integer Multiplication Algorithm on Contemporary Architecture by Chang, Boon Chiao

    Published 2018
    “…To achieve certain level of security, Public Key Cryptography algorithm is performed on large integer that is more than 64-bit, typical bit size supported by conventional Central Processing Unit (CPU) (e.g. 512-bit for Elliptic Curve Cryptography (ECC), 2048-bit for Rivest-Shamir-Adleman (RSA) and million bits for Fully Homomorphic Encryption (FHE)). …”
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    Final Year Project / Dissertation / Thesis
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    A Study And Development Of Digital Control Technique For Power Factor Correction Using Pre-Calculated Algorithm With A Low Cost 8-Bit Microcontroller by Liau , Wei Chun

    Published 2013
    “…The mature manufacturing technologies in digital devices has led to the proliferation of powerful yet low cost digital controllers and enable the possibility of digital power factor correction implementation in a more competitive way. A digital control technique for power factor correction using pre-calculated algorithm with a low cost 8-bit microcontroller is studied and presented in this paper. …”
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    Thesis
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    Audio Streaming System Using Real-Time Transport Protocol Based on Java Media Framework by Asaad Aref, Ibrahim

    Published 2004
    “…Java Media Framework library and the RTP protocol for audio transmission were used as development tools.The developed system designed in this thesis together with experimental results proved that the system could be implemented successfully. …”
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    Thesis
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    Instruction Set Extension Of A Low-End Reconfigurable Microcontroller In Bit-Sorting Implementation by Salim, Sani Irwan, Soo, Yew Guan, Samsudin, Sharatul Izah

    Published 2018
    “…Extensive simulations were performed with the and a comprehensive methodology is proposed. It was found that the ISA extension from 12-bit to 16-bit has produced a faster execution time with fewer resource utilization when implementing the bit-sorting algorithm. …”
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    Article
  20. 20

    Design of a floating point unit for 32-bit 5 stage pipeline processor by Low, Wai Hau

    Published 2020
    “…Also, a dedicated register file is developed for FPU to store 32-bits or 64- bits of data. …”
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    Final Year Project / Dissertation / Thesis