Search Results - (( developing a (processor OR processes) algorithm ) OR ( java implication based algorithm ))

An improvement on the valiantbrebner hypercube data broadcasting technique / Nasaruddin Zenon by Zenon, Nasaruddin

“…The writer tries to improve this algorithm because it is the only known algorithm for the hypercube machine that has the probability of more than i (log n) processors will simultaneously try to transmit a message through a given processor decreases exponentially with i. …”
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Hybrid scheduling and dual queue scheduling by Mahmood, Ahmad Kamil

“…Many algorithms have been developed for the CPU scheduling of a modern multiprogramming operating system. …”
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A mixed integer linear programming model for real-time task scheduling in multiprocessor computer system by Oluwadare, Samuel Adeboyo, Akinnuli, Basil Oluwafemi

“…The advent of multi-processor systems offers a more efficient way of processing multimedia data in real-time.With the development of appropriate scheduling algorithm, another challenge is the mode of assigning tasks in multi-processor systems.This calls for the use of an appropriate mathematical model that will take cognizance of the nature of variables involved.In this research work, a Mixed Integer Linear Programming Model (MILP) was developed to assign tasks in a multiprocessor system.The MILP model was used to assign tasks to multi-processor systems ranging between 5 and 10 homogeneous processors.The result of the simulation runs shows that with the appropriate scheduling algorithm, a high success rate ratio and guaranteed number of deadlines met could be achieved.…”
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'Cruise-and-Collect' algorithm for an ARM-based autonomous robot by Zarina, Mohd. Noh, Sani Irwan, Md. Salim, Norhidayah, Mohamad Yatim, Nur Alisa, Ali, Muzalifah, Mohd. Said

“…It is hoped that the development and design process exposed in this research will be benefitted for researchers who are interested in the area of prototype development and robot design, especially via the ARM7TDMI processor platform.…”
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An embedded processing of differential pulse voltammetry (DPV) data using ARM processor (LPC1768) by Mazaheri, Amin, Mohd Isa, Maryam, Mohd Sidek, Roslina, Yusof, Nor Azah

“…This paper reports an embedded system design of a digital signal processing (DSP) unit for an In-situ analyzing of electrochemical data obtained by differential pulse voltammetry (DPV) from a three-electrode cell. …”
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Peningkatan halaju suapan maksimum penginterpolasi CNC dedenyut rujukan menggunakan pengaturcaraan selari by Ahmad Fakhri, Ab. Nasir

“…In the recent years, the computer industry has changed a lot in term of hardware development. Multi-core processors were introduced whereby a single computer has two processors working on it and contain multiple logical processors in a single package. …”
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Hybrid scheduling and dual queue scheduling by A., Oxley, S.N.M., Shah, A.K., Mahmood

“…Many algorithms have been developed for the CPU scheduling of a modern multiprogramming operating system. …”
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Quantum Processing Framework And Hybrid Algorithms For Routing Problems by Soltan Aghaei, Mohammad Reza

“…A typical component in QPU is a quantum device that runs quantum algorithms; namely Quantum Algorithm Processing Unit (QAPU). …”
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Implementation and Optimization of Human Tracking System Using ARM Embedded Platform by Teoh, Shen Khang, Yap, Vooi Voon, Soh, Chit Siang, Sebastian , Patrick

“…The algorithms are benchmarked on the Intel platform processor and BeagleBoard xM baed on low-power Texas Intruments (TI) DM3730 ARM processor. …”
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Literature Survey On Stereo Vision Disparity Map Algorithms by Rostam Affendi, Hamzah, Haidi, Ibrahim

“…To assist future researchers in developing their own stereo matching algorithms, a summary of the existing algorithms developed for every stage of processing is also provided. …”
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An embedded cryptosystem implementing symmetric cipher and public-key crypto algorithms in hardware by Hau, Yuan Wen

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Design of a floating point unit for 32-bit 5 stage pipeline processor by Low, Wai Hau

“…Also, a dedicated register file is developed for FPU to store 32-bits or 64- bits of data. …”
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Design of an advanced encryption standard crypto-processor core for field programmable gate array implementation by Ismail, Mohd. Izuan

“…The advances in reconfigurable hardware create the possibility of developing a microchip with application-specific processors. …”
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A hardware implementation of Rivest-Shamir-Adleman co-processor for resource constrained embedded systems by Paniandi, Arul

“…Embedded C language codes are then written to test the functionality of the RSA co-processor on hardware. Upon verification, a demonstration application prototype that performs RSA encryption and decryption is developed using Visual Basic 6.0. …”
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Fetal R-Wave detection in the ambulatory monitoring of maternal abdominal signal by Mohd Alauddin Mohd Ali, Crowe, J.A., Hayes-Gill, B.R.

“…An algorithm for the real-time measurement of the fetal and maternal RR intervals from a single-lead abdominal signal has been developed on a low power TMS32010 digital signal processor development system. …”
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Fpga-Based Accelerator For The Identification Of Finger Vein Pattern Via K-Nearest Centroid Neighbors by Yew , Tze Ee

“…The challenge of finger vein recognition in becoming mainstream biometric technology is the processing time of recognition. As almost all finger vein recognition algorithms were implemented using software such as MATLAB which is based on general-purpose processor, the processing speed become the bottleneck of the development of finger vein recognition. …”
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Design of a reconfigurable computing platform by Papu J.J., See O.H.

“…This paper describes a design of a reconfigurable computing platform (RCP) based on the Intel Xeon general purpose processor and the Nallatech BenNUEY-PCI-4E field programmable gate array (FPGA) motherboard. …”

VLSI Design of a neurohardware processor implementing the Kohonen Neural Network algorithm by Rajah, Avinash

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Cache replacement algorithm using hierarchical allocation scheduling by Mohd Sharif, Mohammad Faizal

“…A cache management or also known as a cache replacement policy is a mechanism to manage the process of selecting, keeping, replacing, or evicting the instruction inside cache memory. …”
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Evaluation of reference signal estimation techniques for the control of shunt active power filter by Atan N.B., Yunus B.B.