Search Results - (((( programmable some array ) OR ( programmable data array ))) OR ( programmable rate array ))

FPGA implementation of log-polar mapping by Wong, W.K., Choo, C.W., Loo, C.K., Teh, J.P.

“…In this paper, we try to implement log-polar mapping techniques on Xilinx FPGA (Field Programmable Gate Array) board for unwarping the omnidirectional images into panoramic images to present a wide angle of view by preserving fine output image quality in a higher data compression manner. …”
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Design of an advanced encryption standard crypto-processor core for field programmable gate array implementation by Ismail, Mohd. Izuan

“…The proposed AES Crypto-Processor accelerates the AES algorithm in reconfigurable Field Programmable Gate Arrays (FPGA). The processor design is completely described in hardware description language, VHDL. …”
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Design Of Direct Sequence Code Division Multiple Access (Ds-Cdma) Wireless Transmitter Using Field Programmable Gate Array (Fpga) by Osman, Khalid Eltahir Mohamed

“…This thesis describes the DS-CDMA wireless transmitter design using FPGA (Field Programmable Gate Array), which has been adopted in many wireless access technologies. …”
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Design and implementation of real data fast fourier transform processor on field programmable gates array by Ahmed, Mohammed Kassim

“…In this work, the memorybased FFT processor, based on radix-4 FFT algorithm is implemented on Cyclone II Field Programmable Gates Array (FPGA). In order to program the FPGA, Verilog Hardware Description Language (Verilog HDL) is used. …”
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Dual-sampling sigma-delta analog-to-digital converter implementation in field-programmable gate array by Noor Shah, Mohd Syahril

“…With the latest advancement in field-programmable gate array (FPGA) technology,the analog-to-digital converter (ADC) can now be integrated within the FPGA digital fabric without the need for an external ADC chip. …”
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FPGA-enabled binarised convolutional neural networks toward real-time embedded object recognition system by Shuto, Daisuke, Abbas, Z., Sulaiman, N., Tamukoh, H.

“…In this presentation, we report the results of applying a binarised Convolutional Neural Network (CNN) and a Field Programmable Gate Array (FPGA) for image-based object recognition. …”
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Concurrent hardware architecture for dual-mode audio steganography processor-based FPGA by Shahadi H.I., Jidin R., Way W.H.

Digital beamforming implementation of switch-beam smart antenna system by using integrated digital signal processor and field-programmable gate array by Vakilian, Vida

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Design method to transmit and receive source synchronous signals using source asynchronous by Ramachandran, Nathan

“…Penyelesaian yang dicadangkan juga akan membolehkan jarak penghantaran saluran jam yang lebih panjang digunakan. Lower cost Field Programmable Gate Array (FPGA) devices offer limited data rate speed for source synchronous Low-Voltage Differential Signaling (LVDS) Input-Output (IO) interfaces but higher data rate speeds for source asynchronous transceivers channels. …”
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Embedded System Real Time Data Acquisition System Using FPGA Technology for Detection and Counting of PD Signal from PICO Pulse Generator by Emilliano, Chakrabarty C.K., Basri A., Ramasamy A.K., Suhendi N.

“…Artificial intelligence; Cables; Controllers; Data acquisition; Field programmable gate arrays (FPGA); Microcontrollers; Partial discharges; Photonic integration technology; Signal detection; Signal sampling; Underground cables; Direct measurement; Fpga(field programmable gate array); High speed data acquisition system; Partial discharge signal; PIC microcontrollers; Processing capability; Real-time data acquisition systems; Sampling frequencies; Pulse generators…”

Partial discharge detection system for counting PD signals in high voltage underground cable by using FPGA technology by Emilliano, Chakrabarty C.K., Ramasamy A.K., Ghani A.B.A.

“…Currently, FPGA (Field Programmable Gate Array) technology is being widely used for signal processing and control owing to its fast digital processing capability. …”

FPGA implementation of MCPFSK modulation for HF data communication by Fitri Dewi, Jaswar, Ahmad Zuri, Sha’ameri

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Performance of MIMO DWT for millimeter wave communication system by Parveen, Nagma, Abdullah, Khaizuran, Islam, Md. Rafiqul, Boby, Rounakul Islam

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Design and implementation of low complexity OFDM modulator for broadband wireless devices by Al-Hussaini, Khalid Taher Mohammed

“…This research presents three novel low complexity techniques for reducing CF in OFDM systems followed by an efficient hardware co-simulation implementation of two of these techniques by using a Xilinx system generator on a field programmable gate array (FPGA). The first part of this thesis presents a new subblocks interleaving partial transmit sequence (SBI-PTS) technique having low complexity for reducing the CF in OFDM systems followed by an efficient hardware co-simulation implementation of this technique by using a Xilinx system generator on a field programmable gate array (FPGA). …”
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Reusable data-path architecture for encryption-then-authentication on FPGA by Abbas Y.A., Jidin R., Jamil N., Zaba M.R.

“…In addition to efforts by many researches to optimize hardware architectures, to reduce hardware resources, our proposal is to reuse identical functional blocks within crypto-algorithms targeting for more secure cryptography like Message Authentication Code (MAC), authenticated encryption such as Encrypt-then-MAC (EtM) on Field Programmable Gate Arrays (FPGA). For this proposed reusable data-path, we have chosen LED algorithm for encryption and then PHOTON to generate the MAC code. …”

DESIGN AND IMPLEMENTATION OF VLSI BASED HARDWARE ACCELERATORS FOR REAL TIME VIDEO IMAGE PROCESSING by YASRI, INDRA

“…The embedded video image processing with the integrated hardware accelerator edge detection co-processor was integrated with Altera Quartus System-On- a�Programmable-Chip (SOPC). The implementation result shows a field programmable gate arrays (FPGAs) acting as co-processor platforms for user defined co-processor, with real time performance at a frame rate of 30 fps with a resolution of 720 x 480. …”
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Implementation Of Bluetooth Baseband Controller Based On FPGA Design by Tan, Weng Hooi

“…This research implements the Bluetooth baseband controller based on Field- Programmable Gate Array (FPGA) design. Verilog Hardware Description Language (VHDL) is used in the designation.…”
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Hardware Implementation Of Rc4a Stream Cipher Algorithm by Al Noman, Abdullah

“…For hardware implementation of the design, an Altera Field Programmable Gate Array (FPGA) device, EP20K200EFC484-2X from APEX family, APEX 20KE, has been used. …”
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Implementation On UTeMRISC Microcontroller With Embedded Fault-Tolerance by Mohd Hafiz, Sulaiman, Sani Irwan, Md Salim, Masrullizam, Mat Ibrahim

“…The design is focused on the implementation of Hamming Code and Single-Error-Correction Double-Error-Detection (SEC-DED) Code that are synthesizable in the Field Programmable Gate Array (FPGA). To evaluate the performance and functionality of the design, a number of pre-defined faults are injected into the Fault-Tolerant module at three different locations in the UTeMRISC Microcontroller architecture. …”
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Towards Maximising Hardware Resources and Design Efficiency via High-Speed Implementation of HMAC based on SHA-256 Design by Shamsiah, Suhaili, Norhuzaimin, Julai, Rohana, Sapawi, Nordiana, Rajaee

“…It was successfully developed using Verilog Hardware Description Language (HDL) code with the implementation of a Field Programmable Gate Array (FPGA) device using the Altera Quartus II Computer-Aided Design (CAD) tool to enhance the maximum frequency of the design. …”
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