Search Results - (((( programmable same array ) OR ( programmable data array ))) OR ( programmable rate array ))

Design and implementation of real data fast fourier transform processor on field programmable gates array by Ahmed, Mohammed Kassim

“…Therefore, and for accurate comparison, this study aims to investigate the most common algorithms of RFFT on the same device and resources used. In this work, the memorybased FFT processor, based on radix-4 FFT algorithm is implemented on Cyclone II Field Programmable Gates Array (FPGA). …”
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Concurrent hardware architecture for dual-mode audio steganography processor-based FPGA by Shahadi H.I., Jidin R., Way W.H.

Design of field programmable gate array-based proportional-integral-derivative fuzzy logic controller with tunable ganin by Obaid, Zeyad Assi

“…Many of fuzzy control applications require real-time operation; higher density programmable logic devices such as Field Programmable Gate Array (FPGA) can be used to integrate large amounts of logic in a single IC. …”
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Design of an advanced encryption standard crypto-processor core for field programmable gate array implementation by Ismail, Mohd. Izuan

“…The proposed AES Crypto-Processor accelerates the AES algorithm in reconfigurable Field Programmable Gate Arrays (FPGA). The processor design is completely described in hardware description language, VHDL. …”
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Hardware Implementation Of Modified A5/1 Stream Cipher by Siti Yohana Akmal Mohd Fauzi, Kamaruzzaman Seman, Marinah Othman, Farrah Masyitah Mohd Shuib

Design Of Direct Sequence Code Division Multiple Access (Ds-Cdma) Wireless Transmitter Using Field Programmable Gate Array (Fpga) by Osman, Khalid Eltahir Mohamed

“…This thesis describes the DS-CDMA wireless transmitter design using FPGA (Field Programmable Gate Array), which has been adopted in many wireless access technologies. …”
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Fast fourier transform processor implementation for high inputs on field programmable gates array by Ali Abbas, Zaid

“…Memory-based architecture chosen to use for FFT processors, due to the reduction in the number of butterflies and rotators, as they are reused for different stages of the FFT, were implemented on Cyclone II Field Programmable Gate Arrays (FPGA). Verilog Hardware Description Language (Verilog HDL) and VHDL Languages are used to program the algorithms into the FPGA. …”
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Digital beamforming implementation of switch-beam smart antenna system by using integrated digital signal processor and field-programmable gate array by Vakilian, Vida

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Design method to transmit and receive source synchronous signals using source asynchronous by Ramachandran, Nathan

“…Penyelesaian yang dicadangkan juga akan membolehkan jarak penghantaran saluran jam yang lebih panjang digunakan. Lower cost Field Programmable Gate Array (FPGA) devices offer limited data rate speed for source synchronous Low-Voltage Differential Signaling (LVDS) Input-Output (IO) interfaces but higher data rate speeds for source asynchronous transceivers channels. …”
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Embedded System Real Time Data Acquisition System Using FPGA Technology for Detection and Counting of PD Signal from PICO Pulse Generator by Emilliano, Chakrabarty C.K., Basri A., Ramasamy A.K., Suhendi N.

“…Artificial intelligence; Cables; Controllers; Data acquisition; Field programmable gate arrays (FPGA); Microcontrollers; Partial discharges; Photonic integration technology; Signal detection; Signal sampling; Underground cables; Direct measurement; Fpga(field programmable gate array); High speed data acquisition system; Partial discharge signal; PIC microcontrollers; Processing capability; Real-time data acquisition systems; Sampling frequencies; Pulse generators…”

Partial discharge detection system for counting PD signals in high voltage underground cable by using FPGA technology by Emilliano, Chakrabarty C.K., Ramasamy A.K., Ghani A.B.A.

“…Currently, FPGA (Field Programmable Gate Array) technology is being widely used for signal processing and control owing to its fast digital processing capability. …”

Compiler-based prefetching algorithm for recursive data structure by Anuar, Nurulhaini

“…This best algorithm consists of greedy prefetching and prefetch array algorithms. The proposed algorithm have been implemented and tested in the same environment as existing algorithms and the results shows the better improvement achieved compared from the best algorithm. …”
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FPGA implementation of MCPFSK modulation for HF data communication by Fitri Dewi, Jaswar, Ahmad Zuri, Sha’ameri

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Performance of MIMO DWT for millimeter wave communication system by Parveen, Nagma, Abdullah, Khaizuran, Islam, Md. Rafiqul, Boby, Rounakul Islam

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FPGA implementation of log-polar mapping by Wong, W.K., Choo, C.W., Loo, C.K., Teh, J.P.

“…In this paper, we try to implement log-polar mapping techniques on Xilinx FPGA (Field Programmable Gate Array) board for unwarping the omnidirectional images into panoramic images to present a wide angle of view by preserving fine output image quality in a higher data compression manner. …”
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Hardware implementation of RC4A stream cipher by Al Noman, Abdullah, Mohd Sidek, Roslina, Ramli, Abdul Rahman

“…The cipher was designed using Verilog hardware description language and implemented into a single Altera APEXTM 20K200E Field Programmable Gate Array (FPGA).…”
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Design and implementation of low complexity OFDM modulator for broadband wireless devices by Al-Hussaini, Khalid Taher Mohammed

“…This research presents three novel low complexity techniques for reducing CF in OFDM systems followed by an efficient hardware co-simulation implementation of two of these techniques by using a Xilinx system generator on a field programmable gate array (FPGA). The first part of this thesis presents a new subblocks interleaving partial transmit sequence (SBI-PTS) technique having low complexity for reducing the CF in OFDM systems followed by an efficient hardware co-simulation implementation of this technique by using a Xilinx system generator on a field programmable gate array (FPGA). …”
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Design and development of high performance swa cell design for local DNA sequence alignment by Syed Abdul Rahman, Syed Abdul Mutalib Al Junid

“…Moreover, there have been intensive efforts in improving the performance of the sequence alignment process via hardware-based acceleration using the Field Programmable Gate Array (FPGA). This implementation is becoming popular due to the flexibility of the acceleration design, the ability to reduce the execution cycle, parallel computational solutions, and the ability to increase the performance of alignment at the same time. …”
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Accelerated Verilog Simulator Using Application Specific Microprocessor by Tan Tze Sin, Tze Sin

“…A functional system, VerCPU, was developed and prototyped on a Field Programmable Gate Array (FPGA) development board. This system was successfully verified and benchmarked against a software-based compiled-code simulator, i.e. …”
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DESIGN AND IMPLEMENTATION OF VLSI BASED HARDWARE ACCELERATORS FOR REAL TIME VIDEO IMAGE PROCESSING by YASRI, INDRA

“…The embedded video image processing with the integrated hardware accelerator edge detection co-processor was integrated with Altera Quartus System-On- a�Programmable-Chip (SOPC). The implementation result shows a field programmable gate arrays (FPGAs) acting as co-processor platforms for user defined co-processor, with real time performance at a frame rate of 30 fps with a resolution of 720 x 480. …”
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