Search Results - (((( programmable name array ) OR ( programmable same array ))) OR ( programmable rate array ))

Search alternatives:

Refine Results
  1. 1
  2. 2

    Design of field programmable gate array-based proportional-integral-derivative fuzzy logic controller with tunable ganin by Obaid, Zeyad Assi

    Published 2010
    “…Many of fuzzy control applications require real-time operation; higher density programmable logic devices such as Field Programmable Gate Array (FPGA) can be used to integrate large amounts of logic in a single IC. …”
    Get full text
    Get full text
    Thesis
  3. 3

    Design and implementation of real data fast fourier transform processor on field programmable gates array by Ahmed, Mohammed Kassim

    Published 2015
    “…Therefore, and for accurate comparison, this study aims to investigate the most common algorithms of RFFT on the same device and resources used. In this work, the memorybased FFT processor, based on radix-4 FFT algorithm is implemented on Cyclone II Field Programmable Gates Array (FPGA). …”
    Get full text
    Get full text
    Thesis
  4. 4
  5. 5
  6. 6

    Design and development of high performance swa cell design for local DNA sequence alignment / Syed Abdul Mutalib Al Junid Syed Abdul Rahman by Syed Abdul Rahman, Syed Abdul Mutalib Al Junid

    Published 2017
    “…Moreover, there have been intensive efforts in improving the performance of the sequence alignment process via hardware-based acceleration using the Field Programmable Gate Array (FPGA). This implementation is becoming popular due to the flexibility of the acceleration design, the ability to reduce the execution cycle, parallel computational solutions, and the ability to increase the performance of alignment at the same time. …”
    Get full text
    Get full text
    Book Section
  7. 7

    Design and development of high performance swa cell design for local DNA sequence alignment by Syed Abdul Rahman, Syed Abdul Mutalib Al Junid

    Published 2017
    “…Moreover, there have been intensive efforts in improving the performance of the sequence alignment process via hardware-based acceleration using the Field Programmable Gate Array (FPGA). This implementation is becoming popular due to the flexibility of the acceleration design, the ability to reduce the execution cycle, parallel computational solutions, and the ability to increase the performance of alignment at the same time. …”
    Get full text
    Get full text
    Thesis
  8. 8

    New CFAR algorithm and circuit development for radar receiver by Kamal, Mustafa Subhi

    Published 2020
    “…The last MATLAB test for MSS-CA- vi CFAR with a spiky exponential model shown in Table 4.3 in chapter four shows clearly that MSS-CA-CFAR detects nine targets from ten that means the efficiency of detection of the proposed method is 90%. The field-programmable gate array FPGA chip that is used to implement the MSS-CA-CFAR algorithm needs only three signals from the radar receiver to match with the receiver circuit correctly which are time base clock signal period reset trigger signal and the pulse duration time.…”
    Get full text
    Get full text
    Get full text
    Get full text
    Thesis
  9. 9

    Enhancing obfuscation technique for protecting source code against software reverse engineering by Mahfoudh, Asma

    Published 2019
    “…Obfuscation techniques allow the programmer to customize which part of the code to be obfuscated. …”
    Get full text
    Get full text
    Thesis
  10. 10

    QYPS HPS Interconnect verification methodology for SOC FPGA by Loh , Tat Jen

    Published 2013
    “…Berbanding dengan ujian pengesahan HPS RTL, masa simulasi yang lebih pendek telah diperhatikan semasa menguji fungsi yang sama dalam cadangan kaedah pengesahan. Field programmable gate array (FPGA) with embedded processor is the future trend for the high performance and low power applications. …”
    Get full text
    Get full text
    Thesis
  11. 11

    Peak to average power ratio reduction based on optimum phase sequence in orthogonal frequency division multiplexing systems by Mohammady, Somayeh

    Published 2012
    “…In order to demonstrate the feasibility of these methods in actual systems, the prototype of DSI-SLM and OPS-DSI methods are carried out in Field Programmable Gate Array (FPGA). The implementation results are comparable with simulation results. …”
    Get full text
    Get full text
    Thesis
  12. 12

    Field programmable gate array based sigmoid function implementation using differential lookup table and second order nonlinear function by Syahrulanuar, Ngah

    Published 2021
    “…In order to overcome this, ANN is implemented into hardware namely field-programmable-gate-array (FPGA). However, implementing the ANN into a field-programmable gate array (FPGA) has led to a new problem related to the sigmoid function implementation. …”
    Get full text
    Get full text
    Thesis
  13. 13

    Implementation of a New Torque and Flux Controllers for Direct Torque Control (DTC) of Induction Machine Utilizing Digital Signal Processor (DSP) and Field Programmable Gate Arrays... by Toh, C. L., Idris, Nik Rumzi, Yatim, Abdul Halim, Muhammad, N. D., Elbuluk, M. E.

    Published 2005
    “…Implementation of these controllers using the combination of a digital signal processor (DSP) and a field programmable gate array (FPGA) device is presented. The simulation and experimental results showed that the controllers were capable of reducing the torque and flux ripples significantly. …”
    Get full text
    Get full text
    Get full text
    Article
  14. 14

    Design of fuzzy logic controller for AC motor based on field programmable gate array by Obaid, Zeyad Assi, Sulaiman, Nasri, Hamidon, Mohd Nizar

    Published 2009
    “…Fuzzy logic controller has been designed using VHDL language for implementation in field programmable gate array (FPGA). Two version of the controller have been designed, the first one is 6-bits which uses 6-bits for each input/output variables (6FBC), while the second uses 8-bits for each input/output variables (8FBC). …”
    Get full text
    Get full text
    Conference or Workshop Item
  15. 15

    Cryptographic protection of block-oriented storage devices using AES-XTS in FPGA by Ahmed, Shakil

    Published 2013
    “…Implementations based on hardware are further categorized into two; Application Specific Integrated Circuits (ASICs) and FPGAs (Field Programmable Gate Arrays). FPGAs offer several advantages in comparison to ASICS which are its time to market and overall cost. …”
    Get full text
    Get full text
    Thesis
  16. 16
  17. 17

    FPGA Implementation of Emergency Door Car Entry System by Zaini Sulaiman

    Published 2008
    “…Emergency door car entry system can be implemented using Field Programmable Gate Array (FPGA) board. FPGA board is a board that can be programmed using source code to run the application that has been downloaded into it. …”
    Get full text
    Learning Object
  18. 18

    Design of an advanced encryption standard crypto-processor core for field programmable gate array implementation by Ismail, Mohd. Izuan

    Published 2006
    “…The proposed AES Crypto-Processor accelerates the AES algorithm in reconfigurable Field Programmable Gate Arrays (FPGA). The processor design is completely described in hardware description language, VHDL. …”
    Get full text
    Get full text
    Thesis
  19. 19

    Design Of Direct Sequence Code Division Multiple Access (Ds-Cdma) Wireless Transmitter Using Field Programmable Gate Array (Fpga) by Osman, Khalid Eltahir Mohamed

    Published 2002
    “…This thesis describes the DS-CDMA wireless transmitter design using FPGA (Field Programmable Gate Array), which has been adopted in many wireless access technologies. …”
    Get full text
    Get full text
    Thesis
  20. 20

    Implementation of a low complexity peak-to-average power ratio reduction scheme on field programmable gate array by Varahram, Pooria, Mohd Ali, Borhanuddin

    Published 2015
    “…Here implementation of a proposed PTS on field programmable gate array platform to show the feasibility of the PAPR reduction scheme is carried out. …”
    Get full text
    Get full text
    Get full text
    Article