Search Results - (((( programmable data array ) OR ( programmable rate array ))) OR ( programmable give array ))

Design of an advanced encryption standard crypto-processor core for field programmable gate array implementation by Ismail, Mohd. Izuan

“…The proposed AES Crypto-Processor accelerates the AES algorithm in reconfigurable Field Programmable Gate Arrays (FPGA). The processor design is completely described in hardware description language, VHDL. …”
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Design Of Direct Sequence Code Division Multiple Access (Ds-Cdma) Wireless Transmitter Using Field Programmable Gate Array (Fpga) by Osman, Khalid Eltahir Mohamed

“…This thesis describes the DS-CDMA wireless transmitter design using FPGA (Field Programmable Gate Array), which has been adopted in many wireless access technologies. …”
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Design and implementation of real data fast fourier transform processor on field programmable gates array by Ahmed, Mohammed Kassim

“…In this work, the memorybased FFT processor, based on radix-4 FFT algorithm is implemented on Cyclone II Field Programmable Gates Array (FPGA). In order to program the FPGA, Verilog Hardware Description Language (Verilog HDL) is used. …”
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FPGA configuration on Xilinx ML506 development board through the USB port in C/HDL by Kushal, Sreedhar

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Concurrent hardware architecture for dual-mode audio steganography processor-based FPGA by Shahadi H.I., Jidin R., Way W.H.

Design of DNA sequence alignment accelerated system using 2-dimensional array and custom instruction on FPGA / Nur Dalilah Ahmad Sabri by Ahmad Sabri, Nur Dalilah

“…Other than that, an implementation of a platform called Field Programmable Gate Array (FPGA) has been used in optimizing the 2D Array to perform accelerate sequence alignment activities. …”
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Digital beamforming implementation of switch-beam smart antenna system by using integrated digital signal processor and field-programmable gate array by Vakilian, Vida

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Design method to transmit and receive source synchronous signals using source asynchronous by Ramachandran, Nathan

“…Penyelesaian yang dicadangkan juga akan membolehkan jarak penghantaran saluran jam yang lebih panjang digunakan. Lower cost Field Programmable Gate Array (FPGA) devices offer limited data rate speed for source synchronous Low-Voltage Differential Signaling (LVDS) Input-Output (IO) interfaces but higher data rate speeds for source asynchronous transceivers channels. …”
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Compiler-based prefetching algorithm for recursive data structure by Anuar, Nurulhaini

“…There are three existing techniques that are selected for comparative study that are Greedy Prefetching, Jump History Pointer and Prefetch Array. The results from the comparative study and lab experiment give the best algorithm which is guide to design the proposed algorithm. …”
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Embedded System Real Time Data Acquisition System Using FPGA Technology for Detection and Counting of PD Signal from PICO Pulse Generator by Emilliano, Chakrabarty C.K., Basri A., Ramasamy A.K., Suhendi N.

“…Artificial intelligence; Cables; Controllers; Data acquisition; Field programmable gate arrays (FPGA); Microcontrollers; Partial discharges; Photonic integration technology; Signal detection; Signal sampling; Underground cables; Direct measurement; Fpga(field programmable gate array); High speed data acquisition system; Partial discharge signal; PIC microcontrollers; Processing capability; Real-time data acquisition systems; Sampling frequencies; Pulse generators…”

Partial discharge detection system for counting PD signals in high voltage underground cable by using FPGA technology by Emilliano, Chakrabarty C.K., Ramasamy A.K., Ghani A.B.A.

“…Currently, FPGA (Field Programmable Gate Array) technology is being widely used for signal processing and control owing to its fast digital processing capability. …”

FPGA implementation of MCPFSK modulation for HF data communication by Fitri Dewi, Jaswar, Ahmad Zuri, Sha’ameri

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Programming in C for foundation by Bakar, Noor Hasrina, Hassan, Noor Azimah, Idris, Mohd Norhaedir, Al-Shawabkeh, Mahmoud

“…Chapter 2, "Fundamentals of C" gives a thorough introduction to the data in C programs. …”
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Performance of MIMO DWT for millimeter wave communication system by Parveen, Nagma, Abdullah, Khaizuran, Islam, Md. Rafiqul, Boby, Rounakul Islam

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An FPGA based embedded vision system for real-time motion detection by AlDahoul, Nouar, Htike@Muhammad Yusof, Zaw Zaw

“…This paper proposes an efficient FPGA (Field Programmable Gate Array) based real time video processing platform for monocular object detection. …”
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Digital Signal Processor (DSP) Design Using Very Long Instruction Word (VLIW) Architecture by Lee, Lini @ Lini Lee

“…In order to gain most benefit from the architecture, "Field Programmable Gate Array" (FPGA) technology can be used. …”
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FPGA implementation of log-polar mapping by Wong, W.K., Choo, C.W., Loo, C.K., Teh, J.P.

“…In this paper, we try to implement log-polar mapping techniques on Xilinx FPGA (Field Programmable Gate Array) board for unwarping the omnidirectional images into panoramic images to present a wide angle of view by preserving fine output image quality in a higher data compression manner. …”
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Analysis of FPGA design methods using AN 8 BIT ALU by Mohd Zin, Rosnah

“…Field Programmable Logic Arrays (FPGAs) have been growing at a rapid rate in the past few years. …”
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Design and implementation of low complexity OFDM modulator for broadband wireless devices by Al-Hussaini, Khalid Taher Mohammed

“…This research presents three novel low complexity techniques for reducing CF in OFDM systems followed by an efficient hardware co-simulation implementation of two of these techniques by using a Xilinx system generator on a field programmable gate array (FPGA). The first part of this thesis presents a new subblocks interleaving partial transmit sequence (SBI-PTS) technique having low complexity for reducing the CF in OFDM systems followed by an efficient hardware co-simulation implementation of this technique by using a Xilinx system generator on a field programmable gate array (FPGA). …”
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DESIGN AND IMPLEMENTATION OF VLSI BASED HARDWARE ACCELERATORS FOR REAL TIME VIDEO IMAGE PROCESSING by YASRI, INDRA

“…The embedded video image processing with the integrated hardware accelerator edge detection co-processor was integrated with Altera Quartus System-On- a�Programmable-Chip (SOPC). The implementation result shows a field programmable gate arrays (FPGAs) acting as co-processor platforms for user defined co-processor, with real time performance at a frame rate of 30 fps with a resolution of 720 x 480. …”
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