Search Results - "Electronics Design Automation (EDA) tool"

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  1. 1
    Design of a 5.8 GHz directional coupler using electronics design automation tool

    Design of a 5.8 GHz directional coupler using electronics design automation tool by Hock G.C., Chakrabarty C.K.

    Published 2023
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  2. 2
    High speed 4-bit flash ADC for pipeline ADC using 0.18μm CMOS technology: article

    High speed 4-bit flash ADC for pipeline ADC using 0.18μm CMOS technology: article by Mohd Akbar, Nurul Dalila

    Published 2012
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  3. 3
    Encoders design for 4-bit flash ADC using 0.18nm CMOS technology / Faridah Fasyah Yendiri Abdullah

    Encoders design for 4-bit flash ADC using 0.18nm CMOS technology / Faridah Fasyah Yendiri Abdullah by Abdullah, Faridah Fasyah Yendiri

    Published 2014
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  4. 4
    High speed 4-bit flash ADC for pipeline ADC using 0.18μm CMOS technology

    High speed 4-bit flash ADC for pipeline ADC using 0.18μm CMOS technology by Mohd Akbar, Nurul Dalila

    Published 2012
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  5. 5
    FPGA implementation of multiplier for floating-point numbers based on IEEE 754-2008 standard

    FPGA implementation of multiplier for floating-point numbers based on IEEE 754-2008 standard by Shyamsi, M., Ibrahimy, Muhammad Ibn, Motakabber, S. M. A., Ahsan, M. R.

    Published 2015
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  6. 6
    Analysis of pipeline ADC performances with different sample and hold circuits / Asma Mohd Salleh

    Analysis of pipeline ADC performances with different sample and hold circuits / Asma Mohd Salleh by Mohd Salleh, Asma

    Published 2014
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  7. 7
    Design of a 5.8 GHz rat-race coupler on the RO4003C� substrate

    Design of a 5.8 GHz rat-race coupler on the RO4003C� substrate by Hock G.C., Chakrabarty C.K.

    Published 2023
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  8. 8
    130 nm low power CMOS analog multiplier

    130 nm low power CMOS analog multiplier by Abu Naim, Ahmad Safuan, Ruslan, Siti Hawa

    Published 2018
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  9. 9
    Hardware modeling of binary coded decimal adder in FPGA

    Hardware modeling of binary coded decimal adder in FPGA by Ibrahimy, Muhammad Ibn, Ahsan, Md. Rezwanul, Bambang Soeroso, Iksannurazmi

    Published 2012
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  10. 10
    Hardware modeling of binary coded decimal adder in field programmable gate array

    Hardware modeling of binary coded decimal adder in field programmable gate array by Ibrahimy, Muhammad Ibn, Ahsan, Md. Rezwanul, Soeroso, Iksannurazmi Bambang

    Published 2013
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  11. 11
    High speed 4-bit flash ADC with low INL and DNL using 0.18µm CMOS technology

    High speed 4-bit flash ADC with low INL and DNL using 0.18µm CMOS technology by Wasli, Azrin

    Published 2015
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  12. 12
    High speed 4-bit flash ADC with low INL and DNL using 0.18µm CMOS technology: article

    High speed 4-bit flash ADC with low INL and DNL using 0.18µm CMOS technology: article by Wasli, Azrin

    Published 2015
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  13. 13
    Optimization and analysis of FPGA-based systolic array for matrix multiplication

    Optimization and analysis of FPGA-based systolic array for matrix multiplication by Shapri, Ahmad Husni Mohd, Rahman, Norazeani Abdul, Zakaria, Syed Muhammad Mamduh Syed, Chieh, Kiu Kwong, Saat, Shakir

    Published 2024
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  14. 14
    Design of Brent Kung Prefix form Carry Look Ahead adder

    Design of Brent Kung Prefix form Carry Look Ahead adder by Azuan Amin, Muhammad Aiman, Yaacob, Mashkuri, Gunawan, Teddy Surya, Kartiwi, Mira, Hamidi, Eki A.Z, Ismail, Nanang

    Published 2022
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  15. 15
    Design of serial peripheral interface with flexible modes and frequency for advanced microcontroller bus architecture-advanced peripheral bus interface / Muhammad Hafeez Sabparie

    Design of serial peripheral interface with flexible modes and frequency for advanced microcontroller bus architecture-advanced peripheral bus interface / Muhammad Hafeez Sabparie by Sabparie, Muhammad Hafeez

    Published 2022
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