130 nm low power CMOS analog multiplier
Processing analog signal often involves analog multiplier and the multiplier is part of system on chip (SoC). Designing such system with a low power consumption is crucial nowadays. It is very important to increase the system battery lifetime. The design also must be smaller in size. In order to red...
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| Main Authors: | , |
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| Format: | Article |
| Language: | en |
| Published: |
IOP Publishing
2018
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| Subjects: | |
| Online Access: | http://eprints.uthm.edu.my/2901/1/AJ%202019%20%2864%29.pdf http://eprints.uthm.edu.my/2901/ https://iopscience.iop.org/article/10.1088/1742-6596/1049/1/012071 |
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