Control factors optimization on threshold voltage and leakage current in 22 nm NMOS transistor using Taguchi method
In this article, Taguchi method was used to optimize the control factor in obtaining the optimal value which is also known as response characteristics, where the threshold voltage (Vth) and leakage current (Ileak) for NMOS transistor with a gate length of 22 nm is taken into account. The NMOS transi...
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Universiti Teknikal Malaysia Melaka
2023
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| author | Afifah Maheran A.H. Menon P.S. Ahmad I. Salehuddin F. Mohd A.S. Noor Z.A. Elgomati H.A. |
| author2 | 36570222300 |
| author_facet | 36570222300 Afifah Maheran A.H. Menon P.S. Ahmad I. Salehuddin F. Mohd A.S. Noor Z.A. Elgomati H.A. |
| author_sort | Afifah Maheran A.H. |
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| content_provider | Universiti Tenaga Nasional |
| content_source | UNITEN Institutional Repository |
| continent | Asia |
| country | Malaysia |
| description | In this article, Taguchi method was used to optimize the control factor in obtaining the optimal value which is also known as response characteristics, where the threshold voltage (Vth) and leakage current (Ileak) for NMOS transistor with a gate length of 22 nm is taken into account. The NMOS transistor design includes a high permittivity material (high-k) as a dielectric layer and a metal gate which is Titanium Dioxide (TiO2) and Tungsten Silicide (WSiX) respectively. The control factor was optimized in designing the NMOS device using the Taguchi Orthogonal Array Method where the Signal-To-Noise Ratio (SNR) analysis uses the Nominal-The-Best (NTB) SNR for Vth, while for Ileak analysis, a Smaller-The-Better (STB) SNR was used. Four manufacturing control factors and two noise factor are used to optimize the response characteristics and find the best combination of design parameters. The results show that the Halo implantation tilting angle is the dominant factor where it has the greatest factor effect on the SNR of the Ileak with 55.52%. It is also shown that the values of Vth have the least variance and the mean value can be set to 0.289 V � 12.7% and Ileak is less than 100 nA/?m which is in line with the projections made by the International Technology Roadmap for Semiconductors (ITRS). |
| format | Article |
| id | my.uniten.dspace-23398 |
| institution | Universiti Tenaga Nasional |
| publishDate | 2023 |
| publisher | Universiti Teknikal Malaysia Melaka |
| record_format | dspace |
| spelling | my.uniten.dspace-233982023-05-29T14:40:09Z Control factors optimization on threshold voltage and leakage current in 22 nm NMOS transistor using Taguchi method Afifah Maheran A.H. Menon P.S. Ahmad I. Salehuddin F. Mohd A.S. Noor Z.A. Elgomati H.A. 36570222300 57201289731 12792216600 36239165300 57196423028 57196411125 36536722700 In this article, Taguchi method was used to optimize the control factor in obtaining the optimal value which is also known as response characteristics, where the threshold voltage (Vth) and leakage current (Ileak) for NMOS transistor with a gate length of 22 nm is taken into account. The NMOS transistor design includes a high permittivity material (high-k) as a dielectric layer and a metal gate which is Titanium Dioxide (TiO2) and Tungsten Silicide (WSiX) respectively. The control factor was optimized in designing the NMOS device using the Taguchi Orthogonal Array Method where the Signal-To-Noise Ratio (SNR) analysis uses the Nominal-The-Best (NTB) SNR for Vth, while for Ileak analysis, a Smaller-The-Better (STB) SNR was used. Four manufacturing control factors and two noise factor are used to optimize the response characteristics and find the best combination of design parameters. The results show that the Halo implantation tilting angle is the dominant factor where it has the greatest factor effect on the SNR of the Ileak with 55.52%. It is also shown that the values of Vth have the least variance and the mean value can be set to 0.289 V � 12.7% and Ileak is less than 100 nA/?m which is in line with the projections made by the International Technology Roadmap for Semiconductors (ITRS). Final 2023-05-29T06:40:09Z 2023-05-29T06:40:09Z 2017 Article 2-s2.0-85032895208 https://www.scopus.com/inward/record.uri?eid=2-s2.0-85032895208&partnerID=40&md5=8b6c0a5c34c140a29badb7cd6a3ba0d5 https://irepository.uniten.edu.my/handle/123456789/23398 9 2-Jul 137 141 Universiti Teknikal Malaysia Melaka Scopus |
| spellingShingle | Afifah Maheran A.H. Menon P.S. Ahmad I. Salehuddin F. Mohd A.S. Noor Z.A. Elgomati H.A. Control factors optimization on threshold voltage and leakage current in 22 nm NMOS transistor using Taguchi method |
| title | Control factors optimization on threshold voltage and leakage current in 22 nm NMOS transistor using Taguchi method |
| title_full | Control factors optimization on threshold voltage and leakage current in 22 nm NMOS transistor using Taguchi method |
| title_fullStr | Control factors optimization on threshold voltage and leakage current in 22 nm NMOS transistor using Taguchi method |
| title_full_unstemmed | Control factors optimization on threshold voltage and leakage current in 22 nm NMOS transistor using Taguchi method |
| title_short | Control factors optimization on threshold voltage and leakage current in 22 nm NMOS transistor using Taguchi method |
| title_sort | control factors optimization on threshold voltage and leakage current in 22 nm nmos transistor using taguchi method |
| url_provider | http://dspace.uniten.edu.my/ |