Search Results - Maheran A.H.A.
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Statistical process modelling for 32nm high-K/metal gate PMOS device by Maheran A.H.A., Noor Faizah Z.A., Menon P.S., Ahmad I., Apte P.R., Kalaivani T., Salehuddin F.
Published 2023Conference Paper -
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Effect of process parameter variability on the threshold voltage of downscaled 22nm PMOS using taguchi method by Maheran A.H.A., Menon P.S., Shaari S., Kalaivani T., Ahmad I., Faizah Z.A.N., Apte P.R.
Published 2023Conference Paper -
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Modeling of 14 nm gate length n-Type MOSFET by Faizah Z.A.N., Ahmad I., Ker P.J., Roslan P.S.A., Maheran A.H.A.
Published 2023Conference Paper -
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Statistical optimization of process parameters for threshold voltage in 22 nm p-Type MOSFET using Taguchi method by Maheran A.H.A., Menon P.S., Shaari S., Ahmad I., Faizah Z.A.N.
Published 2023Conference Paper -
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Development of process parameters for 22 nm PMOS using 2-D analytical modeling by Maheran A.H.A., Menon P.S., Ahmad I., Shaari S., Faizah Z.A.N.
Published 2023Conference Paper -
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