Search Results - Kaharudin, K.E.

Taguchi modeling of process parameters in vdg-mosfet device for higher ION/IOFF ratio by Kaharudin K.E., Salehuddin F., Hamidon A.H., Aziz M.N.I.A., Ahmad I.

Impact of high-k insulators on electrical properties of junctionless double gate strained transistor by Kaharudin K.E., Salehuddin F., Zain A.S.M., Jalaludin N.A., Arith F., Junos S.A.M., Ahmad I.

Unveiling the photovoltaic properties of ETL-free, lead-free, and graphene-based PSC by Jalaludin N.A., Salehuddin F., Arith F., Zain A.S.M., Kaharudin K.E., Junos S.A.M., Ahmad I.

Statistical optimization influence on high permittivity gate spacer in 16nm DG-FinFET device / Ameer F. Rosla … [et al.] by Rosla, Ameer F., Salehuddin, F., Zain, A.S.M., Kaharudin, K.E., Mohamad, N.R., A.H, Afifah Maheran, Haroon, H., Razak, H.A., Idris, S.K., Ahmad, I.

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Application of taguchi method with the interaction test for lower DIBL IN WSix/TiO2 channel vertical double gate NMOS by Kaharudin K.E., Salehuddin F., Zain A.S.M., Aziz M.N.I.A., Ahmad I.

Variability analysis of process parameters on subthreshold swing in vertical DG-MOSFET device by Kaharudin K.E., Salehuddin F., Hamidon A.H., Zain A., Abd Aziz M.N.I., Ahmad I.

Electrical characterization of different high-k dielectrics with tungsten silicide in vertical double gate nmos structure by Kaharudin K.E., Salehuddin F., Soin N., Zain A.S.M., Aziz M.N.I.A., Ahmad I.

Optimization of process parameter variations on threshold voltage in Ultrathin Pillar Vertical Double Gate MOSFET Device by Kaharudin K.E., Hamidon A.H., Salehuddin F., Ifwat Abd Aziz M.N., Ahmad I.

Optimization of 16 nm DG-FinFET using L25 orthogonal array of Taguchi statistical method by Roslan A.F., Salehuddin F., Zain A.S.M., Kaharudin K.E., Ahmad I.

Enhanced performance of 19 single gate MOSFET with high permittivity dielectric material by Roslan A.F., Salehuddin F., Zain A.S.M., Kaharudin K.E., Ahmad I.

Statistical Optimization Influence on High Permittivity Gate Spacer in 16nm DG-FinFET Device by Roslan A.F., Salehuddin F., Zain A.S.M., Kaharudin K.E., Mohamad N.R., Maheran A.H.A., Haroon H., Razak H.A., Idris S.K., Ahmad I.

Analysis of Inverted Planar Perovskite Solar Cells with Graphene Oxide as HTL using L9 OA Taguchi Method by Johari N.A., Jalaludin N.A., Salehuddin F., Arith F., Kaharudin K.E., Zain A.S.M., Junos S.A.M., Ahmad I.

Impact of strained channel on electrical properties of Junctionless Double Gate MOSFET by Kaharudin K.E., Salehuddin F., Zain A.S.M., Roslan A.F., Ahmad I.

Comparison of L25 GRA and L25 taguchi statistical method for optimizing 16 NM DG-FinFET on output variation by Roslan A.F., Salehuddin F., Zain A.S.M., Kaharudin K.E., Ahmad I.

Optimal modeling of perovskite solar cell with graphene oxide as hole transport layer using L32 (28) Taguchi design by Kaharudin K.E., Jalaludin N.A., Salehuddin F., Arith F., Zain A.S.M., Ahmad I., Junos S.A.M., Maheran A.H.A.

Comparative high-K material gate spacer impact in DG-finfet parameter variations between two structures by Roslan A.F., Salehuddin F., Zain A.S.M., Kaharudin K.E., Ahmad I., Hazura H., Hanim A.R., Idris S.K.

Optimization of process parameter variations for 16nm DG-FinFET using Response Surface Methodology-Central Composite Design by Roslan A.F., Salehuddin F., Zain A.S.M., Kaharudin K.E., Ahmad I., Hazura H., Hanim A.R., Idris S.K., Hamid A.M.A.

PREDICTIVE ANALYTICS OF JUNCTIONLESS DOUBLE GATE STRAINED MOSFET USING GENETIC ALGORITHM WITH DOE-BASED GREY RELATIONAL ANALYSIS by Kaharudin K.E., Salehuddin F., Jalaludin N.A., Arith F., Zain A.S.M., Ahmad I., Junos S.A.M.

Metaheuristic Optimization of Perovskite Solar Cell Using Hybrid L32 Taguchi Doe-Based Genetic Algorithm by Kaharudin K.E., Jalaludin N.A., Salehuddin F., Arith F., Mohd Zain A.S., Ahmad I., Mat Junos S.A., Apte P.R.

Optimization of 10nm Bi-GFET Device for higher ION/IOFF ratio using Taguchi Method by Roslan A.F., Kaharudin K.E., Salehuddin F., Zain A.S.M., Ahmad I., Faizah Z.A.N., Hazura H., Hanim A.R., Idris S.K., Zaiton A.M., Mohamad N.R., Hamid A.M.A.