Search Results - Elgomati H.A.

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  1. 1
    Design and optimization of 22nm NMOS transistor

    Design and optimization of 22nm NMOS transistor by Afifah Maheran A.H., Menon P.S., Ahmad I., Shaari S., Elgomati H.A., Majlis B.Y., Salehuddin F.

    Published 2023
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  2. 2
    Scaling down of the 32 nm to 22 nm gate length NMOS transistor

    Scaling down of the 32 nm to 22 nm gate length NMOS transistor by Afifah Maheran A.H., Menon P.S., Ahmad I., Elgomati H.A., Majlis B.Y., Salehuddin F.

    Published 2023
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  3. 3
    Application of Taguchi method in the optimization of process variation for 32nm CMOS technology

    Application of Taguchi method in the optimization of process variation for 32nm CMOS technology by Elgomati H.A., Majlis B.Y., Ahmad I., Salehuddin F., Hamid F.A., Zaharim A., Apte P.R.

    Published 2023
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  4. 4
    Statistical optimization for process parameters to reduce variability of 32 nm PMOS transistor threshold voltage

    Statistical optimization for process parameters to reduce variability of 32 nm PMOS transistor threshold voltage by Elgomati H.A., Majlis B.Y., Ahmad I., Salehuddin F., Hamid F.A., Zaharim A., Mohamad T.Z., Apte P.R.

    Published 2023
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  5. 5
    Characterization of fabrication process noises for 32nm NMOS devices

    Characterization of fabrication process noises for 32nm NMOS devices by Elgomati H.A., Majlis B.Y., Ahmad I., Ziad T.

    Published 2023
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  6. 6
    Control factors optimization on threshold voltage and leakage current in 22 nm NMOS transistor using Taguchi method

    Control factors optimization on threshold voltage and leakage current in 22 nm NMOS transistor using Taguchi method by Afifah Maheran A.H., Menon P.S., Ahmad I., Salehuddin F., Mohd A.S., Noor Z.A., Elgomati H.A.

    Published 2023
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  7. 7
    Design and optimization of 22 nm gate length high-k/metal gate NMOS transistor

    Design and optimization of 22 nm gate length high-k/metal gate NMOS transistor by Afifah Maheran A.H., Menon P.S., Ahmad I., Shaari S., Elgomati H.A., Salehuddin F.

    Published 2023
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  8. 8
    Modeling and optimizing of threshold voltage of 32nm NMOS transistor using L18 orthogonal array Taguchi method

    Modeling and optimizing of threshold voltage of 32nm NMOS transistor using L18 orthogonal array Taguchi method by Elgomati H.A., Majlis B.Y., Ahmad I.

    Published 2023
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  9. 9
    Analyze of input process parameter variation on threshold voltage in 45nm n-channel MOSFET

    Analyze of input process parameter variation on threshold voltage in 45nm n-channel MOSFET by Salehuddin F., Ahmad I., Hamid F.A., Zaharim A., Elgomati H.A., Majlis B.Y.

    Published 2023
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  10. 10
    Optimization of HALO structure effects in 45nm p-type MOSFETs device using taguchi method

    Optimization of HALO structure effects in 45nm p-type MOSFETs device using taguchi method by Salehuddin F., Ahmad I., Hamid F.A., Zaharim A., Elgomati H.A., Majlis B.Y., Apte P.R.

    Published 2023
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  11. 11
    Minimum leakage current optimization on 22 nm SOI NMOS device with HfO2/WSix/Graphene gate structure using Taguchi method.

    Minimum leakage current optimization on 22 nm SOI NMOS device with HfO2/WSix/Graphene gate structure using Taguchi method. by Afifah Maheran A.H., Firhat E.N., Salehuddin F., Mohd Zain A.S., Ahmad I., Noor Faizah Z.A., Menon P.S., Elgomati H.A., Roslan A.F.

    Published 2023
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  12. 12
    Modelling of process parameters for 32nm PMOS transistor using Taguchi method

    Modelling of process parameters for 32nm PMOS transistor using Taguchi method by Elgomati H.A., Majlis B.Y., Hamid A.M.A., Susthitha P.M., Ahmad I.

    Published 2023
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  13. 13
    Optimization of process parameter variation in 45nm p-channel MOSFET using L18 orthogonal array

    Optimization of process parameter variation in 45nm p-channel MOSFET using L18 orthogonal array by Salehuddin F., Ahmad I., Hamid F.A., Zaharim A., Hamid A.M.A., Menon P.S., Elgomati H.A., Majlis B.Y., Apte P.R.

    Published 2023
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  14. 14
    Cobalt silicide and titanium silicide effects on nano devices

    Cobalt silicide and titanium silicide effects on nano devices by Elgomati H.A., Majlis B.Y., Salehuddin F., Ahmad I., Zaharim A., Hamid F.A.

    Published 2023
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  15. 15
    Optimizing 35nm NMOS devices V TH and I LEAK by controlling active area and halo implantation dosage

    Optimizing 35nm NMOS devices V TH and I LEAK by controlling active area and halo implantation dosage by Elgomati H.A., Majlis B.Y., Salehuddin F., Ahmad I., Zaharim A., Hamid F.A.

    Published 2023
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