A programmable CMOS delay line for wide delay range generation and duty-cycle adjustability

• Main Authors: Abdulrazzaq, Bilal Isam, Abdul Halin, Izhal, Lee, Lini, Mohd Sidek, Roslina, Md Yunus, Nurul Amziah
• Format: Article
• Language: English
• Published: Universiti Putra Malaysia Press 2017
• Online Access: http://psasir.upm.edu.my/id/eprint/55852/1/15-JTS%28S%29-0129-2016-4thProof.pdf; http://psasir.upm.edu.my/id/eprint/55852/; http://www.pertanika.upm.edu.my/Pertanika%20PAPERS/JST%20Vol.%2025%20(S)%20Feb.%202017/15-JTS(S)-0129-2016-4thProof.pdf

A programmable CMOS delay line circuit with microsecond delay range and adjustable duty cycle is proposed. Through circuit simulation, approximately 2µs delay range can be achieved using 10-bit counter operating at a clock frequency of 500MHz. Utilising synchronous counters instead of synchronous la...